Changeset c520034 in mainline for kernel/arch/ia64/include/mm/page.h


Ignore:
Timestamp:
2011-12-31T18:19:35Z (12 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
295f658, 77c2b02, 96cd5b4
Parents:
852052d (diff), 22f0561 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Support for kernel non-identity mappings, phase I.

  • identity/non-identity kernel memory split on all architectures
  • low/high physical memory split on all architectures
  • frame allocator understands low/high memory
  • high physical memory currently unused (Phase II)
  • more compact frame_t
  • zone conf frames, pte_t, kernel stacks allocated from low memory
  • lockless TLB-miss handlers everywhere (newly sparc64, ia64)
  • preallocate PTL1 page tables for non-identity and prevent their deallocation
  • hw_map() unification
  • new resource allocator used for allocating kernel virtual addresses

Breakage:

  • sparc64/sun4v creates too large kernel identity; not fixed because of lack of testing hw
  • ppc32's tlb_refill() seems wrong as it creates too large kernel identity, but appears unused and the architecture works normally

Not implemented yet (phase II):

  • allow high memory to be used for common kernel allocations
File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/include/mm/page.h

    r852052d rc520034  
    4343
    4444/** Bit width of the TLB-locked portion of kernel address space. */
    45 #define KERNEL_PAGE_WIDTH  28  /* 256M */
    46 #define IO_PAGE_WIDTH      26  /* 64M */
    47 #define FW_PAGE_WIDTH      28  /* 256M */
    48 
    49 #define USPACE_IO_PAGE_WIDTH  12  /* 4K */
    50 
    51 
    52 /*
    53  * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
    54  * because of "minimal virtual bits implemented is 51" it is possible to
    55  * have values up to 0x0007000000000000
    56  */
    57 
    58 /* Firmware area (bellow 4GB in phys mem) */
    59 #define FW_OFFSET   0x00000000F0000000
    60 /* Legacy IO space */
    61 #define IO_OFFSET   0x0001000000000000
    62 /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
    63 #define VIO_OFFSET  0x0002000000000000
    64 
     45#define KERNEL_PAGE_WIDTH       28      /* 256M */
    6546
    6647#define PPN_SHIFT  12
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