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Changeset b97b348 in mainline


Ignore:
Timestamp:
2010-05-12T20:00:19Z (11 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master
Children:
be6cef1b
Parents:
f09d891
Message:

do not use ofw_quiesce() (it can actually make more harm than good)
fix the order of arguments passed from the bootloader to kernel on sparc64 (this fixes booting on machines with non-zero physical address start)
remove separate cache.S, use the code directly in start.S

Files:
1 deleted
10 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/ppc32/src/main.c

    rf09d891 rb97b348  
    167167       
    168168        printf("Booting the kernel...\n");
    169         ofw_quiesce();
    170169        jump_to_kernel(bootinfo_pa, transtable_pa, pages, real_mode_pa);
    171170}
  • boot/arch/sparc64/include/asm.h

    rf09d891 rb97b348  
    3333#include <typedefs.h>
    3434
    35 extern void jump_to_kernel(void *entry, bootinfo_t *bootinfo,
    36     uintptr_t physmem_start, uint8_t subarch) __attribute__((noreturn));
     35extern void jump_to_kernel(uintptr_t physmem_start, bootinfo_t *bootinfo,
     36    uint8_t subarch, void *entry) __attribute__((noreturn));
    3737
    3838#endif
  • boot/arch/sparc64/src/asm.S

    rf09d891 rb97b348  
    182182         * (subarch).
    183183         */
    184         cmp %i2, SUBARCH_US3
     184        cmp %o2, SUBARCH_US3
    185185        be %xcc, 1f
    186186        nop
     
    199199       
    200200        ! Jump to kernel
    201         mov %o0, %l1
    202         mov %o1, %o0
    203         mov %o3, %o1
    204        
    205         jmp %l1
     201        jmp %o3
    206202        nop
    207203
  • boot/arch/sparc64/src/main.c

    rf09d891 rb97b348  
    205205       
    206206        void *bootinfo_pa = ofw_translate(&bootinfo);
     207        void *kernel_address_pa = ofw_translate((void *) KERNEL_ADDRESS);
    207208        void *loader_address_pa = ofw_translate((void *) LOADER_ADDRESS);
    208209       
     
    210211            bootinfo.memmap.total >> 20, bootinfo.physmem_start);
    211212        printf(" %p|%p: boot info structure\n", &bootinfo, bootinfo_pa);
    212         printf(" %p|%p: kernel entry point\n", KERNEL_ADDRESS, KERNEL_ADDRESS);
     213        printf(" %p|%p: kernel entry point\n", KERNEL_ADDRESS, kernel_address_pa);
    213214        printf(" %p|%p: loader entry pount\n", LOADER_ADDRESS, loader_address_pa);
    214215       
     
    304305       
    305306        printf("Booting the kernel ...\n");
    306         ofw_quiesce();
    307         jump_to_kernel((void *) KERNEL_ADDRESS, &bootinfo, subarch,
    308             bootinfo.physmem_start | BSP_PROCESSOR);
    309 }
     307        jump_to_kernel(bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo, subarch,
     308            (void *) KERNEL_ADDRESS);
     309}
  • kernel/arch/sparc64/Makefile.inc

    rf09d891 rb97b348  
    9090        arch/$(KARCH)/src/trap/$(USARCH)/interrupt.c
    9191
    92 ifeq ($(USARCH),sun4u)
    93         ARCH_SOURCES += \
    94                 arch/$(KARCH)/src/mm/cache.S
    95 endif
    96 
    9792ifeq ($(USARCH),sun4v)
    9893        ARCH_SOURCES += \
  • kernel/arch/sparc64/include/boot/boot.h

    rf09d891 rb97b348  
    8787
    8888extern memmap_t memmap;
    89 extern uintptr_t physmem_start;
    9089
    9190#endif
  • kernel/arch/sparc64/include/mm/cache_spec.h

    rf09d891 rb97b348  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */
     
    3939 * The following macros are valid for the following processors:
    4040 *
    41  *      UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
    42  *      UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
    43  * 
     41 *  UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
     42 *  UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
     43 *
    4444 * Should we support other UltraSPARC processors, we need to make sure that
    4545 * the macros are defined correctly for them.
    4646 */
    47  
     47
    4848#if defined (US)
    49 #define DCACHE_SIZE             (16 * 1024)
     49        #define DCACHE_SIZE  (16 * 1024)
    5050#elif defined (US3)
    51 #define DCACHE_SIZE             (64 * 1024)
     51        #define DCACHE_SIZE  (64 * 1024)
    5252#endif
    53 #define DCACHE_LINE_SIZE        32     
     53
     54#define DCACHE_LINE_SIZE  32
     55#define DCACHE_TAG_SHIFT  2
    5456
    5557#endif
  • kernel/arch/sparc64/src/smp/sun4v/smp.c

    rf09d891 rb97b348  
    433433        if (__hypercall_fast4(CPU_START, cpuid,
    434434            (uint64_t) KA2PA(kernel_image_start), KA2PA(trap_table),
    435             physmem_start) != EOK)
     435            physmem_base) != EOK)
    436436                return false;
    437437#endif
  • kernel/arch/sparc64/src/sun4u/start.S

    rf09d891 rb97b348  
    3636#include <arch/mm/tlb.h>
    3737#include <arch/mm/tte.h>
     38#include <arch/mm/cache_spec.h>
    3839
    3940#ifdef CONFIG_SMP
     
    6263 *
    6364 * The registers are expected to be in this state:
    64  *  - %o0 bootinfo structure address (BSP only)
    65  *  - %o1 starting address of physical memory
     65 *  - %o0 starting address of physical memory
    6666 *        + bootstrap processor flag
    6767 *          bits 63...1: physical memory starting address / 2
    6868 *          bit 0:       non-zero on BSP processor, zero on AP processors
     69 *  - %o1 bootinfo structure address (BSP only)
     70 *
    6971 *
    7072 * Moreover, we depend on boot having established the following environment:
     
    7779kernel_image_start:
    7880        mov BSP_FLAG, %l0
    79         and %o1, %l0, %l7                       ! l7 <= bootstrap processor?
    80         andn %o1, %l0, %l6                      ! l6 <= start of physical memory
     81        and %o0, %l0, %l7                       ! l7 <= bootstrap processor?
     82        andn %o0, %l0, %l6                      ! l6 <= start of physical memory
    8183
    8284        ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
     
    268270        or %l3, %l5, %l3
    269271        stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]
    270 
    271         /*
    272          * Flush D-Cache.
    273          */
    274         call dcache_flush
    275         nop
    276 
     272       
     273        ! flush the whole D-cache
     274        set (DCACHE_SIZE - DCACHE_LINE_SIZE), %g1
     275        stxa %g0, [%g1] ASI_DCACHE_TAG
     276       
     2770:
     278        membar #Sync
     279        subcc %g1, DCACHE_LINE_SIZE, %g1
     280        bnz,pt %xcc, 0b
     281       
     282        stxa %g0, [%g1] ASI_DCACHE_TAG
     283        membar #Sync
     284       
    277285        /*
    278286         * So far, we have not touched the stack.
     
    282290        or %sp, %lo(temporary_boot_stack), %sp
    283291        sub %sp, STACK_BIAS, %sp
    284 
     292       
     293        /*
     294         * Call arch_pre_main(bootinfo)
     295         */
     296        mov %o1, %o0
    285297        call arch_pre_main
    286298        nop
  • kernel/arch/sparc64/src/sun4v/start.S

    rf09d891 rb97b348  
    9393 *
    9494 * The registers are expected to be in this state:
    95  *  - %o0 bootinfo structure address (BSP only)
    96  *  - %o1 starting address of physical memory
     95 *  - %o0 starting address of physical memory
    9796 *        + bootstrap processor flag
    9897 *          bits 63...1: physical memory starting address / 2
    9998 *          bit 0:       non-zero on BSP processor, zero on AP processors
     99 *  - %o1 bootinfo structure address (BSP only)
     100 *
    100101 *
    101102 * Moreover, we depend on boot having established the following environment:
     
    107108kernel_image_start:
    108109        mov BSP_FLAG, %l0
    109         and %o1, %l0, %l7                       ! l7 <= bootstrap processor?
    110         andn %o1, %l0, %l6                      ! l6 <= start of physical memory
    111         or %o0, %g0, %l0
     110        and %o0, %l0, %l7                       ! l7 <= bootstrap processor?
     111        andn %o0, %l0, %l6                      ! l6 <= start of physical memory
     112        or %o1, %g0, %l1
    112113
    113114        ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
     
    246247        sub %sp, STACK_BIAS, %sp
    247248
    248         or %l0, %g0, %o0
     249        /*
     250         * Call arch_pre_main(bootinfo)
     251         */
     252        or %l1, %g0, %o0
    249253        call arch_pre_main
    250254        nop
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