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Changeset b8230b9 in mainline for kernel/arch/ppc32/include/mm/page.h


Ignore:
Timestamp:
2010-05-22T22:20:37Z (12 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master
Children:
d354d57
Parents:
3d6beaa
Message:

coding style changes, no change in functionality

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ppc32/include/mm/page.h

    r3d6beaa rb8230b9  
    2727 */
    2828
    29 /** @addtogroup ppc32mm 
     29/** @addtogroup ppc32mm
    3030 * @{
    3131 */
     
    3838#include <arch/mm/frame.h>
    3939
    40 #define PAGE_WIDTH      FRAME_WIDTH
    41 #define PAGE_SIZE       FRAME_SIZE
     40#define PAGE_WIDTH  FRAME_WIDTH
     41#define PAGE_SIZE   FRAME_SIZE
    4242
    4343#ifdef KERNEL
    4444
    4545#ifndef __ASM__
    46 #       define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
    47 #       define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
     46        #define KA2PA(x)  (((uintptr_t) (x)) - 0x80000000)
     47        #define PA2KA(x)  (((uintptr_t) (x)) + 0x80000000)
    4848#else
    49 #       define KA2PA(x) ((x) - 0x80000000)
    50 #       define PA2KA(x) ((x) + 0x80000000)
     49        #define KA2PA(x)  ((x) - 0x80000000)
     50        #define PA2KA(x)  ((x) + 0x80000000)
    5151#endif
    5252
     
    6565
    6666/* Number of entries in each level. */
    67 #define PTL0_ENTRIES_ARCH       1024
    68 #define PTL1_ENTRIES_ARCH       0
    69 #define PTL2_ENTRIES_ARCH       0
    70 #define PTL3_ENTRIES_ARCH       1024
     67#define PTL0_ENTRIES_ARCH  1024
     68#define PTL1_ENTRIES_ARCH  0
     69#define PTL2_ENTRIES_ARCH  0
     70#define PTL3_ENTRIES_ARCH  1024
    7171
    7272/* Page table sizes for each level. */
    73 #define PTL0_SIZE_ARCH          ONE_FRAME
    74 #define PTL1_SIZE_ARCH          0
    75 #define PTL2_SIZE_ARCH          0
    76 #define PTL3_SIZE_ARCH          ONE_FRAME
     73#define PTL0_SIZE_ARCH  ONE_FRAME
     74#define PTL1_SIZE_ARCH  0
     75#define PTL2_SIZE_ARCH  0
     76#define PTL3_SIZE_ARCH  ONE_FRAME
    7777
    7878/* Macros calculating indices into page tables on each level. */
    79 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
    80 #define PTL1_INDEX_ARCH(vaddr)  0
    81 #define PTL2_INDEX_ARCH(vaddr)  0
    82 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
     79#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
     80#define PTL1_INDEX_ARCH(vaddr)  0
     81#define PTL2_INDEX_ARCH(vaddr)  0
     82#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
    8383
    8484/* Get PTE address accessors for each level. */
    8585#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    8686        (((pte_t *) (ptl0))[(i)].pfn << 12)
     87
    8788#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
    8889        (ptl1)
     90
    8991#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
    9092        (ptl2)
    91 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
     93
     94#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
    9295        (((pte_t *) (ptl3))[(i)].pfn << 12)
    9396
    9497/* Set PTE address accessors for each level. */
    9598#define SET_PTL0_ADDRESS_ARCH(ptl0)
     99
    96100#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    97101        (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
     102
    98103#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
    99104#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
     105
    100106#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
    101107        (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
     
    104110#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    105111        get_pt_flags((pte_t *) (ptl0), (size_t) (i))
     112
    106113#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    107114        PAGE_PRESENT
     115
    108116#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
    109117        PAGE_PRESENT
     118
    110119#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    111120        get_pt_flags((pte_t *) (ptl3), (size_t) (i))
    112121
    113122/* Set PTE flags accessors for each level. */
    114 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
     123#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    115124        set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
     125
    116126#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    117127#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
     128
    118129#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    119130        set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
    120131
    121132/* Macros for querying the last-level PTEs. */
    122 #define PTE_VALID_ARCH(pte)                     (*((uint32_t *) (pte)) != 0)
    123 #define PTE_PRESENT_ARCH(pte)                   ((pte)->present != 0)
    124 #define PTE_GET_FRAME_ARCH(pte)                 ((pte)->pfn << 12)
    125 #define PTE_WRITABLE_ARCH(pte)                  1
    126 #define PTE_EXECUTABLE_ARCH(pte)                1
     133#define PTE_VALID_ARCH(pte)       (*((uint32_t *) (pte)) != 0)
     134#define PTE_PRESENT_ARCH(pte)     ((pte)->present != 0)
     135#define PTE_GET_FRAME_ARCH(pte)   ((pte)->pfn << 12)
     136#define PTE_WRITABLE_ARCH(pte)    1
     137#define PTE_EXECUTABLE_ARCH(pte)  1
    127138
    128139#ifndef __ASM__
     
    133144/** Page Table Entry. */
    134145typedef struct {
    135         unsigned present : 1;             /**< Present bit. */
    136         unsigned page_write_through : 1;  /**< Write thought caching. */
    137         unsigned page_cache_disable : 1;  /**< No caching. */
    138         unsigned accessed : 1;            /**< Accessed bit. */
    139         unsigned global : 1;              /**< Global bit. */
    140         unsigned valid : 1;               /**< Valid content even if not present. */
    141         unsigned pfn : 20;                /**< Physical frame number. */
     146        unsigned int present : 1;             /**< Present bit. */
     147        unsigned int page_write_through : 1;  /**< Write thought caching. */
     148        unsigned int page_cache_disable : 1;  /**< No caching. */
     149        unsigned int accessed : 1;            /**< Accessed bit. */
     150        unsigned int global : 1;              /**< Global bit. */
     151        unsigned int valid : 1;               /**< Valid content even if not present. */
     152        unsigned int pfn : 20;                /**< Physical frame number. */
    142153} pte_t;
    143154
    144155static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    145156{
    146         pte_t *p = &pt[i];
     157        pte_t *entry = &pt[i];
    147158       
    148         return (((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) |
    149             ((!p->present) << PAGE_PRESENT_SHIFT) |
     159        return (((!entry->page_cache_disable) << PAGE_CACHEABLE_SHIFT) |
     160            ((!entry->present) << PAGE_PRESENT_SHIFT) |
    150161            (1 << PAGE_USER_SHIFT) |
    151162            (1 << PAGE_READ_SHIFT) |
    152163            (1 << PAGE_WRITE_SHIFT) |
    153164            (1 << PAGE_EXEC_SHIFT) |
    154             (p->global << PAGE_GLOBAL_SHIFT));
     165            (entry->global << PAGE_GLOBAL_SHIFT));
    155166}
    156167
    157168static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    158169{
    159         pte_t *p = &pt[i];
     170        pte_t *entry = &pt[i];
    160171       
    161         p->page_cache_disable = !(flags & PAGE_CACHEABLE);
    162         p->present = !(flags & PAGE_NOT_PRESENT);
    163         p->global = (flags & PAGE_GLOBAL) != 0;
    164         p->valid = 1;
     172        entry->page_cache_disable = !(flags & PAGE_CACHEABLE);
     173        entry->present = !(flags & PAGE_NOT_PRESENT);
     174        entry->global = (flags & PAGE_GLOBAL) != 0;
     175        entry->valid = 1;
    165176}
    166177
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