Changeset b80c1ab in mainline for uspace/drv/bus/usb/xhci/commands.c
- Timestamp:
- 2017-11-14T23:17:54Z (6 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e76c0ea
- Parents:
- cfe4852
- git-author:
- Aearsis <Hlavaty.Ondrej@…> (2017-11-14 23:15:24)
- git-committer:
- Aearsis <Hlavaty.Ondrej@…> (2017-11-14 23:17:54)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/commands.c
rcfe4852 rb80c1ab 37 37 #include <str_error.h> 38 38 #include <usb/debug.h> 39 #include <usb/host/utils/malloc32.h>40 39 #include "commands.h" 41 40 #include "debug.h" … … 57 56 */ 58 57 #define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr)) 59 #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, phys_addr& (~0xF))58 #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF)) 60 59 61 60 #define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24) … … 99 98 list_remove(&cmd->_header.link); 100 99 101 if (cmd->input_ctx) { 102 free32(cmd->input_ctx); 103 }; 104 105 if (cmd->bandwidth_ctx) { 106 free32(cmd->bandwidth_ctx); 107 } 100 dma_buffer_free(&cmd->input_ctx); 101 dma_buffer_free(&cmd->bandwidth_ctx); 108 102 109 103 if (cmd->_header.async) { … … 360 354 assert(hc); 361 355 assert(cmd); 362 assert( cmd->input_ctx);356 assert(dma_buffer_is_set(&cmd->input_ctx)); 363 357 364 358 /** … … 371 365 xhci_trb_clean(&cmd->_header.trb); 372 366 373 uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->input_ctx); 374 TRB_SET_ICTX(cmd->_header.trb, phys_addr); 367 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys); 375 368 376 369 /** … … 396 389 if (!cmd->deconfigure) { 397 390 /* If the DC flag is on, input context is not evaluated. */ 398 assert(cmd->input_ctx); 399 400 uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->input_ctx); 401 TRB_SET_ICTX(cmd->_header.trb, phys_addr); 391 assert(dma_buffer_is_set(&cmd->input_ctx)); 392 393 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys); 402 394 } 403 395 … … 413 405 assert(hc); 414 406 assert(cmd); 415 assert( cmd->input_ctx);407 assert(dma_buffer_is_set(&cmd->input_ctx)); 416 408 417 409 /** … … 423 415 xhci_trb_clean(&cmd->_header.trb); 424 416 425 uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->input_ctx); 426 TRB_SET_ICTX(cmd->_header.trb, phys_addr); 417 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys); 427 418 428 419 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD); … … 506 497 xhci_trb_clean(&cmd->_header.trb); 507 498 508 uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->bandwidth_ctx); 509 TRB_SET_ICTX(cmd->_header.trb, phys_addr); 499 TRB_SET_ICTX(cmd->_header.trb, cmd->bandwidth_ctx.phys); 510 500 511 501 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_GET_PORT_BANDWIDTH_CMD);
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