Changeset b1c57a8 in mainline for kernel/arch/ia32/src/smp/apic.c


Ignore:
Timestamp:
2014-10-09T15:03:55Z (10 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e367939c
Parents:
21799398 (diff), 207e8880 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge from lp:~adam-hraska+lp/helenos/rcu/.

Only merge from the feature branch and resolve all conflicts.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/src/smp/apic.c

    r21799398 rb1c57a8  
    264264}
    265265
    266 #define DELIVS_PENDING_SILENT_RETRIES   4       
    267 
     266/* Waits for the destination cpu to accept the previous ipi. */
    268267static void l_apic_wait_for_delivery(void)
    269268{
    270269        icr_t icr;
    271         unsigned retries = 0;
    272 
     270       
    273271        do {
    274                 if (retries++ > DELIVS_PENDING_SILENT_RETRIES) {
    275                         retries = 0;
    276 #ifdef CONFIG_DEBUG
    277                         log(LF_ARCH, LVL_DEBUG, "IPI is pending.");
    278 #endif
    279                         delay(20);
    280                 }
    281272                icr.lo = l_apic[ICRlo];
    282         } while (icr.delivs == DELIVS_PENDING);
    283        
     273        } while (icr.delivs != DELIVS_IDLE);
     274}
     275
     276/** Send one CPU an IPI vector.
     277 *
     278 * @param apicid Physical APIC ID of the destination CPU.
     279 * @param vector Interrupt vector to be sent.
     280 *
     281 * @return 0 on failure, 1 on success.
     282 */
     283int l_apic_send_custom_ipi(uint8_t apicid, uint8_t vector)
     284{
     285        icr_t icr;
     286
     287        /* Wait for a destination cpu to accept our previous ipi. */
     288        l_apic_wait_for_delivery();
     289       
     290        icr.lo = l_apic[ICRlo];
     291        icr.hi = l_apic[ICRhi];
     292       
     293        icr.delmod = DELMOD_FIXED;
     294        icr.destmod = DESTMOD_PHYS;
     295        icr.level = LEVEL_ASSERT;
     296        icr.shorthand = SHORTHAND_NONE;
     297        icr.trigger_mode = TRIGMOD_LEVEL;
     298        icr.vector = vector;
     299        icr.dest = apicid;
     300
     301        /* Send the IPI by writing to l_apic[ICRlo]. */
     302        l_apic[ICRhi] = icr.hi;
     303        l_apic[ICRlo] = icr.lo;
     304       
     305        return apic_poll_errors();
    284306}
    285307
     
    294316{
    295317        icr_t icr;
     318
     319        /* Wait for a destination cpu to accept our previous ipi. */
     320        l_apic_wait_for_delivery();
    296321       
    297322        icr.lo = l_apic[ICRlo];
     
    304329       
    305330        l_apic[ICRlo] = icr.lo;
    306 
    307         l_apic_wait_for_delivery();
    308331       
    309332        return apic_poll_errors();
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