Changeset add04f7 in mainline for kernel/arch/ia32/src/cpu/cpu.c

Timestamp:

2009-03-03T15:20:49Z (15 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f24d300

Parents:

deca67b

Message:

better inline assembler readability using the new symbolic syntax

File:

• kernel/arch/ia32/src/cpu/cpu.c (modified) (5 diffs)

kernel/arch/ia32/src/cpu/cpu.c

@@ -49 +49 @@
  * Contains only non-MP-Specification specific SMP code.
  */
-#define AMD_CPUID_EBX   0x68747541
-#define AMD_CPUID_ECX   0x444d4163
-#define AMD_CPUID_EDX   0x69746e65
+#define AMD_CPUID_EBX  0x68747541
+#define AMD_CPUID_ECX  0x444d4163
+#define AMD_CPUID_EDX  0x69746e65
 
-#define INTEL_CPUID_EBX 0x756e6547
-#define INTEL_CPUID_ECX 0x6c65746e
-#define INTEL_CPUID_EDX 0x49656e69
+#define INTEL_CPUID_EBX  0x756e6547
+#define INTEL_CPUID_ECX  0x6c65746e
+#define INTEL_CPUID_EDX  0x49656e69
 
 
 enum vendor {
-        VendorUnknown=0,
+        VendorUnknown = 0,
         VendorAMD,
         VendorIntel
@@ -73 +73 @@
 {
         asm volatile (
-                "mov %%cr0,%%eax;"
-                "or $8,%%eax;"
-                "mov %%eax,%%cr0;"
-                :
-                :
-                : "%eax"
+                "mov %%cr0, %%eax\n"
+                "or $8, %%eax\n"
+                "mov %%eax, %%cr0\n"
+                ::: "%eax"
         );
 }
@@ -85 +83 @@
 {
         asm volatile (
-                "mov %%cr0,%%eax;"
-                "and $0xffFFffF7,%%eax;"
-                "mov %%eax,%%cr0;"
-                :
-                :
-                : "%eax"
-        );      
+                "mov %%cr0, %%eax\n"
+                "and $0xffFFffF7, %%eax\n"
+                "mov %%eax,%%cr0\n"
+                ::: "%eax"
+        );
 }
 
@@ -103 +99 @@
         CPU->arch.tss = tss_p;
         CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
-
+        
         CPU->fpu_owner = NULL;
-
+        
         cpuid(1, &info);
-
+        
         fi.word = info.cpuid_edx;
         efi.word = info.cpuid_ecx;
@@ -114 +110 @@
                 fpu_fxsr();
         else
-                fpu_fsr();      
+                fpu_fsr();
         
         if (fi.bits.sse) {
                 asm volatile (
-                        "mov %%cr4,%0\n"
-                        "or %1,%0\n"
-                        "mov %0,%%cr4\n"
-                        : "+r" (help)
-                        : "i" (CR4_OSFXSR_MASK|(1<<10)) 
+                        "mov %%cr4, %[help]\n"
+                        "or %[mask], %[help]\n"
+                        "mov %[help], %%cr4\n"
+                        : [help] "+r" (help)
+                        : [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
                 );
         }