Changeset a35b458 in mainline for kernel/arch/sparc64/src/mm/sun4u/as.c
- Timestamp:
- 2018-03-02T20:10:49Z (6 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f1380b7
- Parents:
- 3061bc1
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/sun4u/as.c
r3061bc1 ra35b458 69 69 tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_base); 70 70 memsetb(tsb, TSB_SIZE, 0); 71 71 72 72 as->arch.itsb = tsb; 73 73 as->arch.dtsb = tsb + ITSB_ENTRY_COUNT; 74 74 #endif 75 75 76 76 return EOK; 77 77 } … … 81 81 #ifdef CONFIG_TSB 82 82 frame_free(KA2PA((uintptr_t) as->arch.itsb), TSB_FRAMES); 83 83 84 84 return TSB_FRAMES; 85 85 #else … … 93 93 tsb_invalidate(as, 0, (size_t) -1); 94 94 #endif 95 95 96 96 return 0; 97 97 } … … 107 107 { 108 108 tlb_context_reg_t ctx; 109 109 110 110 /* 111 111 * Note that we don't and may not lock the address space. That's ok … … 115 115 * 116 116 */ 117 117 118 118 /* 119 119 * Write ASID to secondary context register. The primary context … … 126 126 ctx.context = as->asid; 127 127 mmu_secondary_context_write(ctx.v); 128 128 129 129 #ifdef CONFIG_TSB 130 130 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 131 131 132 132 assert(as->arch.itsb); 133 133 assert(as->arch.dtsb); 134 134 135 135 uintptr_t tsb = (uintptr_t) as->arch.itsb; 136 136 137 137 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 138 138 /* … … 145 145 dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true); 146 146 } 147 147 148 148 /* 149 149 * Setup TSB Base registers. … … 151 151 */ 152 152 tsb_base_reg_t tsb_base_reg; 153 153 154 154 tsb_base_reg.value = 0; 155 155 tsb_base_reg.size = TSB_BASE_REG_SIZE; 156 156 tsb_base_reg.split = 0; 157 157 158 158 tsb_base_reg.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH; 159 159 itsb_base_write(tsb_base_reg.value); 160 160 tsb_base_reg.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH; 161 161 dtsb_base_write(tsb_base_reg.value); 162 162 163 163 #if defined (US3) 164 164 /* … … 198 198 * 199 199 */ 200 200 201 201 #ifdef CONFIG_TSB 202 202 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 203 203 204 204 assert(as->arch.itsb); 205 205 assert(as->arch.dtsb); 206 206 207 207 uintptr_t tsb = (uintptr_t) as->arch.itsb; 208 208 209 209 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 210 210 /*
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