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Changeset 9f491d7 in mainline


Ignore:
Timestamp:
2008-06-16T21:42:48Z (14 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial
Children:
4a23cb6
Parents:
ad2e39b
Message:

First argument of atomic functions is read-write (ia32).

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/include/atomic.h

    rad2e39b r9f491d7  
    4242static inline void atomic_inc(atomic_t *val) {
    4343#ifdef CONFIG_SMP
    44         asm volatile ("lock incl %0\n" : "=m" (val->count));
     44        asm volatile ("lock incl %0\n" : "+m" (val->count));
    4545#else
    46         asm volatile ("incl %0\n" : "=m" (val->count));
     46        asm volatile ("incl %0\n" : "+m" (val->count));
    4747#endif /* CONFIG_SMP */
    4848}
     
    5050static inline void atomic_dec(atomic_t *val) {
    5151#ifdef CONFIG_SMP
    52         asm volatile ("lock decl %0\n" : "=m" (val->count));
     52        asm volatile ("lock decl %0\n" : "+m" (val->count));
    5353#else
    54         asm volatile ("decl %0\n" : "=m" (val->count));
     54        asm volatile ("decl %0\n" : "+m" (val->count));
    5555#endif /* CONFIG_SMP */
    5656}
     
    6262        asm volatile (
    6363                "lock xaddl %1, %0\n"
    64                 : "=m" (val->count), "+r" (r)
     64                : "+m" (val->count), "+r" (r)
    6565        );
    6666
     
    7474        asm volatile (
    7575                "lock xaddl %1, %0\n"
    76                 : "=m" (val->count), "+r"(r)
     76                : "+m" (val->count), "+r"(r)
    7777        );
    7878       
     
    8080}
    8181
    82 #define atomic_preinc(val) (atomic_postinc(val)+1)
    83 #define atomic_predec(val) (atomic_postdec(val)-1)
     82#define atomic_preinc(val) (atomic_postinc(val) + 1)
     83#define atomic_predec(val) (atomic_postdec(val) - 1)
    8484
    8585static inline uint32_t test_and_set(atomic_t *val) {
     
    8989                "movl $1, %0\n"
    9090                "xchgl %0, %1\n"
    91                 : "=r" (v),"=m" (val->count)
     91                : "=r" (v),"+m" (val->count)
    9292        );
    9393       
     
    102102        preemption_disable();
    103103        asm volatile (
    104                 "0:;"
     104                "0:\n"
    105105#ifdef CONFIG_HT
    106                 "pause;" /* Pentium 4's HT love this instruction */
     106                "pause\n" /* Pentium 4's HT love this instruction */
    107107#endif
    108                 "mov %0, %1;"
    109                 "testl %1, %1;"
    110                 "jnz 0b;"       /* Lightweight looping on locked spinlock */
     108                "mov %0, %1\n"
     109                "testl %1, %1\n"
     110                "jnz 0b\n"       /* lightweight looping on locked spinlock */
    111111               
    112                 "incl %1;"      /* now use the atomic operation */
    113                 "xchgl %0, %1;"
    114                 "testl %1, %1;"
    115                 "jnz 0b;"
    116                 : "=m"(val->count),"=r"(tmp)
    117                 );
     112                "incl %1\n"      /* now use the atomic operation */
     113                "xchgl %0, %1\n"       
     114                "testl %1, %1\n"
     115                "jnz 0b\n"
     116                : "+m" (val->count), "=r"(tmp)
     117        );
    118118        /*
    119119         * Prevent critical section code from bleeding out this way up.
  • uspace/lib/libc/arch/ia32/include/atomic.h

    rad2e39b r9f491d7  
    3737
    3838static inline void atomic_inc(atomic_t *val) {
    39         asm volatile ("lock incl %0\n" : "=m" (val->count));
     39        asm volatile ("lock incl %0\n" : "+m" (val->count));
    4040}
    4141
    4242static inline void atomic_dec(atomic_t *val) {
    43         asm volatile ("lock decl %0\n" : "=m" (val->count));
     43        asm volatile ("lock decl %0\n" : "+m" (val->count));
    4444}
    4545
     
    5151                "movl $1, %0\n"
    5252                "lock xaddl %0, %1\n"
    53                 : "=r" (r), "=m" (val->count)
     53                : "=r" (r), "+m" (val->count)
    5454        );
    5555
     
    6464                "movl $-1, %0\n"
    6565                "lock xaddl %0, %1\n"
    66                 : "=r" (r), "=m" (val->count)
     66                : "=r" (r), "+m" (val->count)
    6767        );
    6868       
     
    7070}
    7171
    72 #define atomic_preinc(val) (atomic_postinc(val)+1)
    73 #define atomic_predec(val) (atomic_postdec(val)-1)
     72#define atomic_preinc(val) (atomic_postinc(val) + 1)
     73#define atomic_predec(val) (atomic_postdec(val) - 1)
    7474
    7575#endif
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