Changeset ad2e39b in mainline

Timestamp:

2008-06-16T21:36:39Z (16 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

9f491d7

Parents:

5336643

Message:

First argument to atomic functions is read-write (amd64).

Files:

• kernel/arch/amd64/include/atomic.h (modified) (7 diffs)
• uspace/lib/libc/arch/amd64/include/atomic.h (modified) (4 diffs)

kernel/arch/amd64/include/atomic.h

@@ -42 +42 @@
 static inline void atomic_inc(atomic_t *val) {
 #ifdef CONFIG_SMP
-        asm volatile ("lock incq %0\n" : "=m" (val->count));
+        asm volatile ("lock incq %0\n" : "+m" (val->count));
 #else
-        asm volatile ("incq %0\n" : "=m" (val->count));
+        asm volatile ("incq %0\n" : "+m" (val->count));
 #endif /* CONFIG_SMP */
 }
@@ -50 +50 @@
 static inline void atomic_dec(atomic_t *val) {
 #ifdef CONFIG_SMP
-        asm volatile ("lock decq %0\n" : "=m" (val->count));
+        asm volatile ("lock decq %0\n" : "+m" (val->count));
 #else
-        asm volatile ("decq %0\n" : "=m" (val->count));
+        asm volatile ("decq %0\n" : "+m" (val->count));
 #endif /* CONFIG_SMP */
 }
@@ -62 +62 @@
         asm volatile (
                 "lock xaddq %1, %0\n"
-                : "=m" (val->count), "+r" (r)
+                : "+m" (val->count), "+r" (r)
         );
 
@@ -74 +74 @@
         asm volatile (
                 "lock xaddq %1, %0\n"
-                : "=m" (val->count), "+r" (r)
+                : "+m" (val->count), "+r" (r)
         );
         
@@ -80 +80 @@
 }
 
-#define atomic_preinc(val) (atomic_postinc(val)+1)
-#define atomic_predec(val) (atomic_postdec(val)-1)
+#define atomic_preinc(val) (atomic_postinc(val) + 1)
+#define atomic_predec(val) (atomic_postdec(val) - 1)
 
 static inline uint64_t test_and_set(atomic_t *val) {
@@ -89 +89 @@
                 "movq $1, %0\n"
                 "xchgq %0, %1\n"
-                : "=r" (v),"=m" (val->count)
+                : "=r" (v), "+m" (val->count)
         );
         
@@ -103 +103 @@
         preemption_disable();
         asm volatile (
-                "0:;"
+                "0:\n"
 #ifdef CONFIG_HT
-                "pause;"
+                "pause\n"
 #endif
-                "mov %0, %1;"
-                "testq %1, %1;"
-                "jnz 0b;"       /* Lightweight looping on locked spinlock */
+                "mov %0, %1\n"
+                "testq %1, %1\n"
+                "jnz 0b\n"       /* Lightweight looping on locked spinlock */
                 
-                "incq %1;"      /* now use the atomic operation */
-                "xchgq %0, %1;"
-                "testq %1, %1;"
-                "jnz 0b;"
-                : "=m"(val->count),"=r"(tmp)
-                );
+                "incq %1\n"      /* now use the atomic operation */
+                "xchgq %0, %1\n"
+                "testq %1, %1\n"
+                "jnz 0b\n"
+                : "+m" (val->count), "=r"(tmp)
+        );
         /*
          * Prevent critical section code from bleeding out this way up.

uspace/lib/libc/arch/amd64/include/atomic.h

@@ -39 +39 @@
 
 static inline void atomic_inc(atomic_t *val) {
-        asm volatile ("lock incq %0\n" : "=m" (val->count));
+        asm volatile ("lock incq %0\n" : "+m" (val->count));
 }
 
 static inline void atomic_dec(atomic_t *val) {
-        asm volatile ("lock decq %0\n" : "=m" (val->count));
+        asm volatile ("lock decq %0\n" : "+m" (val->count));
 }
 
@@ -53 +53 @@
                 "movq $1, %0\n"
                 "lock xaddq %0, %1\n"
-                : "=r" (r), "=m" (val->count)
+                : "=r" (r), "+m" (val->count)
         );
 
@@ -66 +66 @@
                 "movq $-1, %0\n"
                 "lock xaddq %0, %1\n"
-                : "=r" (r), "=m" (val->count)
+                : "=r" (r), "+m" (val->count)
         );
         
@@ -72 +72 @@
 }
 
-#define atomic_preinc(val) (atomic_postinc(val)+1)
-#define atomic_predec(val) (atomic_postdec(val)-1)
+#define atomic_preinc(val) (atomic_postinc(val) + 1)
+#define atomic_predec(val) (atomic_postdec(val) - 1)
 
 #endif