Changeset 98c4c16 in mainline for boot/arch/arm32/src/asm.S

Timestamp:

2019-07-02T20:30:17Z (5 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

9675296

Parents:

5a5269d

Message:

Enable word-aligned doubleword accesses on ARMv6

This fixes loading by U-boot on Raspberry Pi. U-boot turns on the
alignment enforcement bit in SCTLR and so, unlike when booting without
U-boot, any word-aligned STRD instruction in the loader causes a data
abort exception.

File:

• boot/arch/arm32/src/asm.S (modified) (2 diffs)

boot/arch/arm32/src/asm.S

@@ -32 +32 @@
 .section BOOTSTRAP
 
+#define CP15_C1_U               22
+#define CP15_C1_IC              12
+#define CP15_C1_BP              11
+#define CP15_C1_DC              2
+
 SYMBOL(start)
+
+#ifdef PROCESSOR_ARCH_armv6
+        /*
+         * Enable unaligned doubleword memory accesses (STRD/LDRD) if the
+         * processor supports it. Note that that boils down to ARMv6 processors
+         * only as the older architectures require doubleword alignment and
+         * ARMv7 always assumes the U bit is 1.
+         */
+        mrc     p15, 0, r0, c1, c0, 0
+        orr     r0, r0, #(1 << CP15_C1_U)
+        mcr     p15, 0, r0, c1, c0, 0
+#endif
+
         ldr sp, =boot_stack
         b bootstrap
@@ -59 +77 @@
         # r0 is kernel entry point
         # r1 is pointer to the bootinfo structure
-
-#define CP15_C1_IC              12
-#define CP15_C1_BP              11
-#define CP15_C1_DC              2
-
 
 #ifndef PROCESSOR_ARCH_armv7_a