Changeset 965dc18 in mainline for kernel/arch/sparc64/src/mm/as.c


Ignore:
Timestamp:
2008-12-05T19:59:03Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
49093a4
Parents:
0258e67
Message:

Merge sparc branch to trunk.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/mm/as.c

    r0258e67 r965dc18  
    165165        tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
    166166        dtsb_base_write(tsb_base.value);
     167       
     168#if defined (US3)
     169        /*
     170         * Clear the extension registers.
     171         * In HelenOS, primary and secondary context registers contain
     172         * equal values and kernel misses (context 0, ie. the nucleus context)
     173         * are excluded from the TSB miss handler, so it makes no sense
     174         * to have separate TSBs for primary, secondary and nucleus contexts.
     175         * Clearing the extension registers will ensure that the value of the
     176         * TSB Base register will be used as an address of TSB, making the code
     177         * compatible with the US port.
     178         */
     179        itsb_primary_extension_write(0);
     180        itsb_nucleus_extension_write(0);
     181        dtsb_primary_extension_write(0);
     182        dtsb_secondary_extension_write(0);
     183        dtsb_nucleus_extension_write(0);
     184#endif
    167185#endif
    168186}
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