Changeset 92574f4 in mainline for uspace/drv/pciintel/pci.c
- Timestamp:
- 2011-02-24T12:03:27Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e7b7ebd5
- Parents:
- 4837092 (diff), a80849c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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uspace/drv/pciintel/pci.c
r4837092 r92574f4 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jiri Svoboda 3 4 * All rights reserved. 4 5 * … … 44 45 #include <ctype.h> 45 46 #include <macros.h> 46 47 #include <driver.h> 47 #include <str_error.h> 48 49 #include <ddf/driver.h> 48 50 #include <devman.h> 49 51 #include <ipc/devman.h> 50 52 #include <ipc/dev_iface.h> 53 #include <ipc/irc.h> 54 #include <ipc/ns.h> 55 #include <ipc/services.h> 56 #include <sysinfo.h> 51 57 #include <ops/hw_res.h> 52 58 #include <device/hw_res.h> … … 61 67 ((1 << 31) | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3)) 62 68 63 static hw_resource_list_t *pciintel_get_child_resources(device_t *dev) 64 { 65 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 66 67 if (dev_data == NULL) 69 /** Obtain PCI function soft-state from DDF function node */ 70 #define PCI_FUN(fnode) ((pci_fun_t *) (fnode)->driver_data) 71 72 /** Obtain PCI bus soft-state from DDF device node */ 73 #define PCI_BUS(dnode) ((pci_bus_t *) (dnode)->driver_data) 74 75 /** Obtain PCI bus soft-state from function soft-state */ 76 #define PCI_BUS_FROM_FUN(fun) ((fun)->busptr) 77 78 static hw_resource_list_t *pciintel_get_resources(ddf_fun_t *fnode) 79 { 80 pci_fun_t *fun = PCI_FUN(fnode); 81 82 if (fun == NULL) 68 83 return NULL; 69 return &dev_data->hw_resources; 70 } 71 72 static bool pciintel_enable_child_interrupt(device_t *dev) 73 { 74 /* TODO */ 75 76 return false; 77 } 78 79 static hw_res_ops_t pciintel_child_hw_res_ops = { 80 &pciintel_get_child_resources, 81 &pciintel_enable_child_interrupt 84 return &fun->hw_resources; 85 } 86 87 static bool pciintel_enable_interrupt(ddf_fun_t *fnode) 88 { 89 /* This is an old ugly way, copied from ne2000 driver */ 90 assert(fnode); 91 pci_fun_t *dev_data = (pci_fun_t *) fnode->driver_data; 92 93 sysarg_t apic; 94 sysarg_t i8259; 95 int irc_phone = -1; 96 int irc_service = 0; 97 98 if ((sysinfo_get_value("apic", &apic) == EOK) && (apic)) { 99 irc_service = SERVICE_APIC; 100 } else if ((sysinfo_get_value("i8259", &i8259) == EOK) && (i8259)) { 101 irc_service = SERVICE_I8259; 102 } 103 104 if (irc_service) { 105 while (irc_phone < 0) 106 irc_phone = service_connect_blocking(irc_service, 0, 0); 107 } else { 108 return false; 109 } 110 111 size_t i; 112 for (i = 0; i < dev_data->hw_resources.count; i++) { 113 if (dev_data->hw_resources.resources[i].type == INTERRUPT) { 114 int irq = dev_data->hw_resources.resources[i].res.interrupt.irq; 115 async_msg_1(irc_phone, IRC_ENABLE_INTERRUPT, irq); 116 } 117 } 118 119 async_hangup(irc_phone); 120 return true; 121 } 122 123 static hw_res_ops_t pciintel_hw_res_ops = { 124 &pciintel_get_resources, 125 &pciintel_enable_interrupt 82 126 }; 83 127 84 static d evice_ops_t pci_child_ops;85 86 static int pci_add_device(d evice_t *);87 88 /** The pci bus driver's standard operations.*/128 static ddf_dev_ops_t pci_fun_ops; 129 130 static int pci_add_device(ddf_dev_t *); 131 132 /** PCI bus driver standard operations */ 89 133 static driver_ops_t pci_ops = { 90 134 .add_device = &pci_add_device 91 135 }; 92 136 93 /** The pci bus driver structure.*/137 /** PCI bus driver structure */ 94 138 static driver_t pci_driver = { 95 139 .name = NAME, … … 97 141 }; 98 142 99 typedef struct pciintel_bus_data { 100 uint32_t conf_io_addr; 101 void *conf_data_port; 102 void *conf_addr_port; 103 fibril_mutex_t conf_mutex; 104 } pci_bus_data_t; 105 106 static pci_bus_data_t *create_pci_bus_data(void) 107 { 108 pci_bus_data_t *bus_data; 109 110 bus_data = (pci_bus_data_t *) malloc(sizeof(pci_bus_data_t)); 111 if (bus_data != NULL) { 112 memset(bus_data, 0, sizeof(pci_bus_data_t)); 113 fibril_mutex_initialize(&bus_data->conf_mutex); 114 } 115 116 return bus_data; 117 } 118 119 static void delete_pci_bus_data(pci_bus_data_t *bus_data) 120 { 121 free(bus_data); 122 } 123 124 static void pci_conf_read(device_t *dev, int reg, uint8_t *buf, size_t len) 125 { 126 assert(dev->parent != NULL); 127 128 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 129 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 130 131 fibril_mutex_lock(&bus_data->conf_mutex); 143 static pci_bus_t *pci_bus_new(void) 144 { 145 pci_bus_t *bus; 146 147 bus = (pci_bus_t *) calloc(1, sizeof(pci_bus_t)); 148 if (bus == NULL) 149 return NULL; 150 151 fibril_mutex_initialize(&bus->conf_mutex); 152 return bus; 153 } 154 155 static void pci_bus_delete(pci_bus_t *bus) 156 { 157 assert(bus != NULL); 158 free(bus); 159 } 160 161 static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 162 { 163 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 164 165 fibril_mutex_lock(&bus->conf_mutex); 132 166 133 167 uint32_t conf_addr; 134 conf_addr = CONF_ADDR( dev_data->bus, dev_data->dev, dev_data->fn, reg);135 void *addr = bus _data->conf_data_port + (reg & 3);136 137 pio_write_32(bus _data->conf_addr_port, conf_addr);168 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 169 void *addr = bus->conf_data_port + (reg & 3); 170 171 pio_write_32(bus->conf_addr_port, conf_addr); 138 172 139 173 switch (len) { … … 149 183 } 150 184 151 fibril_mutex_unlock(&bus_data->conf_mutex); 152 } 153 154 static void pci_conf_write(device_t *dev, int reg, uint8_t *buf, size_t len) 155 { 156 assert(dev->parent != NULL); 157 158 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 159 pci_bus_data_t *bus_data = (pci_bus_data_t *) dev->parent->driver_data; 160 161 fibril_mutex_lock(&bus_data->conf_mutex); 185 fibril_mutex_unlock(&bus->conf_mutex); 186 } 187 188 static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len) 189 { 190 pci_bus_t *bus = PCI_BUS_FROM_FUN(fun); 191 192 fibril_mutex_lock(&bus->conf_mutex); 162 193 163 194 uint32_t conf_addr; 164 conf_addr = CONF_ADDR( dev_data->bus, dev_data->dev, dev_data->fn, reg);165 void *addr = bus _data->conf_data_port + (reg & 3);166 167 pio_write_32(bus _data->conf_addr_port, conf_addr);195 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 196 void *addr = bus->conf_data_port + (reg & 3); 197 198 pio_write_32(bus->conf_addr_port, conf_addr); 168 199 169 200 switch (len) { … … 179 210 } 180 211 181 fibril_mutex_unlock(&bus _data->conf_mutex);182 } 183 184 uint8_t pci_conf_read_8( device_t *dev, int reg)212 fibril_mutex_unlock(&bus->conf_mutex); 213 } 214 215 uint8_t pci_conf_read_8(pci_fun_t *fun, int reg) 185 216 { 186 217 uint8_t res; 187 pci_conf_read( dev, reg, &res, 1);218 pci_conf_read(fun, reg, &res, 1); 188 219 return res; 189 220 } 190 221 191 uint16_t pci_conf_read_16( device_t *dev, int reg)222 uint16_t pci_conf_read_16(pci_fun_t *fun, int reg) 192 223 { 193 224 uint16_t res; 194 pci_conf_read( dev, reg, (uint8_t *) &res, 2);225 pci_conf_read(fun, reg, (uint8_t *) &res, 2); 195 226 return res; 196 227 } 197 228 198 uint32_t pci_conf_read_32( device_t *dev, int reg)229 uint32_t pci_conf_read_32(pci_fun_t *fun, int reg) 199 230 { 200 231 uint32_t res; 201 pci_conf_read( dev, reg, (uint8_t *) &res, 4);232 pci_conf_read(fun, reg, (uint8_t *) &res, 4); 202 233 return res; 203 234 } 204 235 205 void pci_conf_write_8(device_t *dev, int reg, uint8_t val) 206 { 207 pci_conf_write(dev, reg, (uint8_t *) &val, 1); 208 } 209 210 void pci_conf_write_16(device_t *dev, int reg, uint16_t val) 211 { 212 pci_conf_write(dev, reg, (uint8_t *) &val, 2); 213 } 214 215 void pci_conf_write_32(device_t *dev, int reg, uint32_t val) 216 { 217 pci_conf_write(dev, reg, (uint8_t *) &val, 4); 218 } 219 220 void create_pci_match_ids(device_t *dev) 221 { 222 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 223 match_id_t *match_id = NULL; 236 void pci_conf_write_8(pci_fun_t *fun, int reg, uint8_t val) 237 { 238 pci_conf_write(fun, reg, (uint8_t *) &val, 1); 239 } 240 241 void pci_conf_write_16(pci_fun_t *fun, int reg, uint16_t val) 242 { 243 pci_conf_write(fun, reg, (uint8_t *) &val, 2); 244 } 245 246 void pci_conf_write_32(pci_fun_t *fun, int reg, uint32_t val) 247 { 248 pci_conf_write(fun, reg, (uint8_t *) &val, 4); 249 } 250 251 void pci_fun_create_match_ids(pci_fun_t *fun) 252 { 224 253 char *match_id_str; 225 226 match_id = create_match_id(); 227 if (match_id != NULL) { 228 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 229 dev_data->vendor_id, dev_data->device_id); 230 match_id->id = match_id_str; 231 match_id->score = 90; 232 add_match_id(&dev->match_ids, match_id); 233 } 234 254 int rc; 255 256 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 257 fun->vendor_id, fun->device_id); 258 259 if (match_id_str == NULL) { 260 printf(NAME ": out of memory creating match ID.\n"); 261 return; 262 } 263 264 rc = ddf_fun_add_match_id(fun->fnode, match_id_str, 90); 265 if (rc != EOK) { 266 printf(NAME ": error adding match ID: %s\n", 267 str_error(rc)); 268 } 269 235 270 /* TODO add more ids (with subsys ids, using class id etc.) */ 236 271 } 237 272 238 void 239 pci_add_range(device_t *dev, uint64_t range_addr, size_t range_size, bool io) 240 { 241 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 242 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 273 void pci_add_range(pci_fun_t *fun, uint64_t range_addr, size_t range_size, 274 bool io) 275 { 276 hw_resource_list_t *hw_res_list = &fun->hw_resources; 243 277 hw_resource_t *hw_resources = hw_res_list->resources; 244 278 size_t count = hw_res_list->count; … … 265 299 * address add it to the devices hw resource list. 266 300 * 267 * @param dev The pci device.301 * @param fun PCI function 268 302 * @param addr The address of the BAR in the PCI configuration address space of 269 * the device .270 * @return The addr the address of the BAR which should be read next .303 * the device 304 * @return The addr the address of the BAR which should be read next 271 305 */ 272 int pci_read_bar( device_t *dev, int addr)273 { 306 int pci_read_bar(pci_fun_t *fun, int addr) 307 { 274 308 /* Value of the BAR */ 275 309 uint32_t val, mask; … … 285 319 286 320 /* Get the value of the BAR. */ 287 val = pci_conf_read_32( dev, addr);321 val = pci_conf_read_32(fun, addr); 288 322 289 323 io = (bool) (val & 1); … … 305 339 306 340 /* Get the address mask. */ 307 pci_conf_write_32( dev, addr, 0xffffffff);308 mask = pci_conf_read_32( dev, addr);341 pci_conf_write_32(fun, addr, 0xffffffff); 342 mask = pci_conf_read_32(fun, addr); 309 343 310 344 /* Restore the original value. */ 311 pci_conf_write_32( dev, addr, val);312 val = pci_conf_read_32( dev, addr);345 pci_conf_write_32(fun, addr, val); 346 val = pci_conf_read_32(fun, addr); 313 347 314 348 range_size = pci_bar_mask_to_size(mask); 315 349 316 350 if (addrw64) { 317 range_addr = ((uint64_t)pci_conf_read_32( dev, addr + 4) << 32) |351 range_addr = ((uint64_t)pci_conf_read_32(fun, addr + 4) << 32) | 318 352 (val & 0xfffffff0); 319 353 } else { … … 322 356 323 357 if (range_addr != 0) { 324 printf(NAME ": device %s : ", dev->name);358 printf(NAME ": function %s : ", fun->fnode->name); 325 359 printf("address = %" PRIx64, range_addr); 326 360 printf(", size = %x\n", (unsigned int) range_size); 327 361 } 328 362 329 pci_add_range( dev, range_addr, range_size, io);363 pci_add_range(fun, range_addr, range_size, io); 330 364 331 365 if (addrw64) … … 335 369 } 336 370 337 void pci_add_interrupt(device_t *dev, int irq) 338 { 339 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 340 hw_resource_list_t *hw_res_list = &dev_data->hw_resources; 371 void pci_add_interrupt(pci_fun_t *fun, int irq) 372 { 373 hw_resource_list_t *hw_res_list = &fun->hw_resources; 341 374 hw_resource_t *hw_resources = hw_res_list->resources; 342 375 size_t count = hw_res_list->count; … … 350 383 hw_res_list->count++; 351 384 352 printf(NAME ": device %s uses irq %x.\n", dev->name, irq);353 } 354 355 void pci_read_interrupt( device_t *dev)356 { 357 uint8_t irq = pci_conf_read_8( dev, PCI_BRIDGE_INT_LINE);385 printf(NAME ": function %s uses irq %x.\n", fun->fnode->name, irq); 386 } 387 388 void pci_read_interrupt(pci_fun_t *fun) 389 { 390 uint8_t irq = pci_conf_read_8(fun, PCI_BRIDGE_INT_LINE); 358 391 if (irq != 0xff) 359 pci_add_interrupt( dev, irq);392 pci_add_interrupt(fun, irq); 360 393 } 361 394 362 395 /** Enumerate (recursively) and register the devices connected to a pci bus. 363 396 * 364 * @param parent The host-to-pci bridge device.365 * @param bus_num The bus number.397 * @param bus Host-to-PCI bridge 398 * @param bus_num Bus number 366 399 */ 367 void pci_bus_scan(device_t *parent, int bus_num) 368 { 369 device_t *dev = create_device(); 370 pci_dev_data_t *dev_data = create_pci_dev_data(); 371 dev->driver_data = dev_data; 372 dev->parent = parent; 400 void pci_bus_scan(pci_bus_t *bus, int bus_num) 401 { 402 ddf_fun_t *fnode; 403 pci_fun_t *fun; 373 404 374 405 int child_bus = 0; 375 406 int dnum, fnum; 376 407 bool multi; 377 uint8_t header_type; 408 uint8_t header_type; 409 410 fun = pci_fun_new(bus); 378 411 379 412 for (dnum = 0; dnum < 32; dnum++) { 380 413 multi = true; 381 414 for (fnum = 0; multi && fnum < 8; fnum++) { 382 init_pci_dev_data(dev_data, bus_num, dnum, fnum);383 dev_data->vendor_id = pci_conf_read_16(dev,415 pci_fun_init(fun, bus_num, dnum, fnum); 416 fun->vendor_id = pci_conf_read_16(fun, 384 417 PCI_VENDOR_ID); 385 dev_data->device_id = pci_conf_read_16(dev,418 fun->device_id = pci_conf_read_16(fun, 386 419 PCI_DEVICE_ID); 387 if ( dev_data->vendor_id == 0xffff) {420 if (fun->vendor_id == 0xffff) { 388 421 /* 389 422 * The device is not present, go on scanning the … … 396 429 } 397 430 398 header_type = pci_conf_read_8( dev, PCI_HEADER_TYPE);431 header_type = pci_conf_read_8(fun, PCI_HEADER_TYPE); 399 432 if (fnum == 0) { 400 433 /* Is the device multifunction? */ … … 404 437 header_type = header_type & 0x7F; 405 438 406 create_pci_dev_name(dev); 407 408 pci_alloc_resource_list(dev); 409 pci_read_bars(dev); 410 pci_read_interrupt(dev); 411 412 dev->ops = &pci_child_ops; 413 414 printf(NAME ": adding new child device %s.\n", 415 dev->name); 416 417 create_pci_match_ids(dev); 418 419 if (child_device_register(dev, parent) != EOK) { 420 pci_clean_resource_list(dev); 421 clean_match_ids(&dev->match_ids); 422 free((char *) dev->name); 423 dev->name = NULL; 439 char *fun_name = pci_fun_create_name(fun); 440 if (fun_name == NULL) { 441 printf(NAME ": out of memory.\n"); 442 return; 443 } 444 445 fnode = ddf_fun_create(bus->dnode, fun_inner, fun_name); 446 if (fnode == NULL) { 447 printf(NAME ": error creating function.\n"); 448 return; 449 } 450 451 free(fun_name); 452 fun->fnode = fnode; 453 454 pci_alloc_resource_list(fun); 455 pci_read_bars(fun); 456 pci_read_interrupt(fun); 457 458 fnode->ops = &pci_fun_ops; 459 fnode->driver_data = fun; 460 461 printf(NAME ": adding new function %s.\n", 462 fnode->name); 463 464 pci_fun_create_match_ids(fun); 465 466 if (ddf_fun_bind(fnode) != EOK) { 467 pci_clean_resource_list(fun); 468 clean_match_ids(&fnode->match_ids); 469 free((char *) fnode->name); 470 fnode->name = NULL; 424 471 continue; 425 472 } … … 427 474 if (header_type == PCI_HEADER_TYPE_BRIDGE || 428 475 header_type == PCI_HEADER_TYPE_CARDBUS) { 429 child_bus = pci_conf_read_8( dev,476 child_bus = pci_conf_read_8(fun, 430 477 PCI_BRIDGE_SEC_BUS_NUM); 431 478 printf(NAME ": device is pci-to-pci bridge, " 432 479 "secondary bus number = %d.\n", bus_num); 433 480 if (child_bus > bus_num) 434 pci_bus_scan( parent, child_bus);481 pci_bus_scan(bus, child_bus); 435 482 } 436 483 437 /* Alloc new aux. dev. structure. */ 438 dev = create_device(); 439 dev_data = create_pci_dev_data(); 440 dev->driver_data = dev_data; 441 dev->parent = parent; 484 fun = pci_fun_new(bus); 442 485 } 443 486 } 444 487 445 if (dev_data->vendor_id == 0xffff) { 446 delete_device(dev); 447 /* Free the auxiliary device structure. */ 448 delete_pci_dev_data(dev_data); 449 } 450 } 451 452 static int pci_add_device(device_t *dev) 453 { 488 if (fun->vendor_id == 0xffff) { 489 /* Free the auxiliary function structure. */ 490 pci_fun_delete(fun); 491 } 492 } 493 494 static int pci_add_device(ddf_dev_t *dnode) 495 { 496 pci_bus_t *bus = NULL; 497 ddf_fun_t *ctl = NULL; 498 bool got_res = false; 454 499 int rc; 455 500 456 501 printf(NAME ": pci_add_device\n"); 457 458 pci_bus_data_t *bus_data = create_pci_bus_data(); 459 if (bus_data == NULL) { 502 dnode->parent_phone = -1; 503 504 bus = pci_bus_new(); 505 if (bus == NULL) { 460 506 printf(NAME ": pci_add_device allocation failed.\n"); 461 return ENOMEM; 462 } 463 464 dev->parent_phone = devman_parent_device_connect(dev->handle, 507 rc = ENOMEM; 508 goto fail; 509 } 510 bus->dnode = dnode; 511 dnode->driver_data = bus; 512 513 dnode->parent_phone = devman_parent_device_connect(dnode->handle, 465 514 IPC_FLAG_BLOCKING); 466 if (d ev->parent_phone < 0) {515 if (dnode->parent_phone < 0) { 467 516 printf(NAME ": pci_add_device failed to connect to the " 468 517 "parent's driver.\n"); 469 delete_pci_bus_data(bus_data);470 return dev->parent_phone;518 rc = dnode->parent_phone; 519 goto fail; 471 520 } 472 521 473 522 hw_resource_list_t hw_resources; 474 523 475 rc = hw_res_get_resource_list(d ev->parent_phone, &hw_resources);524 rc = hw_res_get_resource_list(dnode->parent_phone, &hw_resources); 476 525 if (rc != EOK) { 477 526 printf(NAME ": pci_add_device failed to get hw resources for " 478 527 "the device.\n"); 479 delete_pci_bus_data(bus_data); 480 ipc_hangup(dev->parent_phone); 481 return rc; 482 } 528 goto fail; 529 } 530 got_res = true; 483 531 484 532 printf(NAME ": conf_addr = %" PRIx64 ".\n", … … 489 537 assert(hw_resources.resources[0].res.io_range.size == 8); 490 538 491 bus _data->conf_io_addr =539 bus->conf_io_addr = 492 540 (uint32_t) hw_resources.resources[0].res.io_range.address; 493 541 494 if (pio_enable((void *)(uintptr_t)bus _data->conf_io_addr, 8,495 &bus _data->conf_addr_port)) {542 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8, 543 &bus->conf_addr_port)) { 496 544 printf(NAME ": failed to enable configuration ports.\n"); 497 delete_pci_bus_data(bus_data); 498 ipc_hangup(dev->parent_phone); 545 rc = EADDRNOTAVAIL; 546 goto fail; 547 } 548 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 549 550 /* Make the bus device more visible. It has no use yet. */ 551 printf(NAME ": adding a 'ctl' function\n"); 552 553 ctl = ddf_fun_create(bus->dnode, fun_exposed, "ctl"); 554 if (ctl == NULL) { 555 printf(NAME ": error creating control function.\n"); 556 rc = ENOMEM; 557 goto fail; 558 } 559 560 rc = ddf_fun_bind(ctl); 561 if (rc != EOK) { 562 printf(NAME ": error binding control function.\n"); 563 goto fail; 564 } 565 566 /* Enumerate functions. */ 567 printf(NAME ": scanning the bus\n"); 568 pci_bus_scan(bus, 0); 569 570 hw_res_clean_resource_list(&hw_resources); 571 572 return EOK; 573 574 fail: 575 if (bus != NULL) 576 pci_bus_delete(bus); 577 if (dnode->parent_phone >= 0) 578 async_hangup(dnode->parent_phone); 579 if (got_res) 499 580 hw_res_clean_resource_list(&hw_resources); 500 return EADDRNOTAVAIL; 501 } 502 bus_data->conf_data_port = (char *) bus_data->conf_addr_port + 4; 503 504 dev->driver_data = bus_data; 505 506 /* Enumerate child devices. */ 507 printf(NAME ": scanning the bus\n"); 508 pci_bus_scan(dev, 0); 509 510 hw_res_clean_resource_list(&hw_resources); 511 512 return EOK; 581 if (ctl != NULL) 582 ddf_fun_destroy(ctl); 583 584 return rc; 513 585 } 514 586 515 587 static void pciintel_init(void) 516 588 { 517 pci_child_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_child_hw_res_ops; 518 } 519 520 pci_dev_data_t *create_pci_dev_data(void) 521 { 522 pci_dev_data_t *res = (pci_dev_data_t *) malloc(sizeof(pci_dev_data_t)); 523 524 if (res != NULL) 525 memset(res, 0, sizeof(pci_dev_data_t)); 526 return res; 527 } 528 529 void init_pci_dev_data(pci_dev_data_t *dev_data, int bus, int dev, int fn) 530 { 531 dev_data->bus = bus; 532 dev_data->dev = dev; 533 dev_data->fn = fn; 534 } 535 536 void delete_pci_dev_data(pci_dev_data_t *dev_data) 537 { 538 if (dev_data != NULL) { 539 hw_res_clean_resource_list(&dev_data->hw_resources); 540 free(dev_data); 541 } 542 } 543 544 void create_pci_dev_name(device_t *dev) 545 { 546 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 589 pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops; 590 } 591 592 pci_fun_t *pci_fun_new(pci_bus_t *bus) 593 { 594 pci_fun_t *fun; 595 596 fun = (pci_fun_t *) calloc(1, sizeof(pci_fun_t)); 597 if (fun == NULL) 598 return NULL; 599 600 fun->busptr = bus; 601 return fun; 602 } 603 604 void pci_fun_init(pci_fun_t *fun, int bus, int dev, int fn) 605 { 606 fun->bus = bus; 607 fun->dev = dev; 608 fun->fn = fn; 609 } 610 611 void pci_fun_delete(pci_fun_t *fun) 612 { 613 assert(fun != NULL); 614 hw_res_clean_resource_list(&fun->hw_resources); 615 free(fun); 616 } 617 618 char *pci_fun_create_name(pci_fun_t *fun) 619 { 547 620 char *name = NULL; 548 621 549 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, 550 dev_data->fn); 551 dev->name = name; 552 } 553 554 bool pci_alloc_resource_list(device_t *dev) 555 { 556 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data; 557 558 dev_data->hw_resources.resources = 622 asprintf(&name, "%02x:%02x.%01x", fun->bus, fun->dev, 623 fun->fn); 624 return name; 625 } 626 627 bool pci_alloc_resource_list(pci_fun_t *fun) 628 { 629 fun->hw_resources.resources = 559 630 (hw_resource_t *) malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t)); 560 return dev_data->hw_resources.resources != NULL; 561 } 562 563 void pci_clean_resource_list(device_t *dev) 564 { 565 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 566 567 if (dev_data->hw_resources.resources != NULL) { 568 free(dev_data->hw_resources.resources); 569 dev_data->hw_resources.resources = NULL; 570 } 571 } 572 573 /** Read the base address registers (BARs) of the device and adds the addresses 574 * to its hw resource list. 631 return fun->hw_resources.resources != NULL; 632 } 633 634 void pci_clean_resource_list(pci_fun_t *fun) 635 { 636 if (fun->hw_resources.resources != NULL) { 637 free(fun->hw_resources.resources); 638 fun->hw_resources.resources = NULL; 639 } 640 } 641 642 /** Read the base address registers (BARs) of the function and add the addresses 643 * to its HW resource list. 575 644 * 576 * @param dev the pci device.645 * @param fun PCI function 577 646 */ 578 void pci_read_bars( device_t *dev)647 void pci_read_bars(pci_fun_t *fun) 579 648 { 580 649 /* … … 585 654 586 655 while (addr <= PCI_BASE_ADDR_5) 587 addr = pci_read_bar( dev, addr);656 addr = pci_read_bar(fun, addr); 588 657 } 589 658 … … 597 666 printf(NAME ": HelenOS pci bus driver (intel method 1).\n"); 598 667 pciintel_init(); 599 return d river_main(&pci_driver);668 return ddf_driver_main(&pci_driver); 600 669 } 601 670
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