Changeset 8df5f20 in mainline for kernel/arch/ia32/include/arch/asm.h

Timestamp:

2019-02-11T14:56:26Z (5 years ago)

Author:

Jiří Zárevúcky <zarevucky.jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4805495

Parents:

391996b

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-01 23:26:21)

git-committer:

Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-11 14:56:26)

Message:

Rename NO_TRACE to _NO_TRACE

<trace.h> may end up transitively included from standard headers,
so it needs to be a reserved identifier.

File:

• kernel/arch/ia32/include/arch/asm.h (modified) (26 diffs)

kernel/arch/ia32/include/arch/asm.h

@@ -48 +48 @@
  *
  */
-NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
+_NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
 {
         while (true) {
@@ -57 +57 @@
 }
 
-NO_TRACE static inline void cpu_sleep(void)
+_NO_TRACE static inline void cpu_sleep(void)
 {
         asm volatile (
@@ -64 +64 @@
 }
 
-#define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \
+#define GEN_READ_REG(reg) _NO_TRACE static inline sysarg_t read_ ##reg (void) \
         { \
                 sysarg_t res; \
@@ -74 +74 @@
         }
 
-#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \
+#define GEN_WRITE_REG(reg) _NO_TRACE static inline void write_ ##reg (sysarg_t regn) \
         { \
                 asm volatile ( \
@@ -113 +113 @@
  *
  */
-NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
+_NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
 {
         if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
@@ -132 +132 @@
  *
  */
-NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
+_NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
 {
         if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
@@ -151 +151 @@
  *
  */
-NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
+_NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
 {
         if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
@@ -170 +170 @@
  *
  */
-NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
+_NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
 {
         if (((void *)port) < IO_SPACE_BOUNDARY) {
@@ -194 +194 @@
  *
  */
-NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
+_NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
 {
         if (((void *)port) < IO_SPACE_BOUNDARY) {
@@ -218 +218 @@
  *
  */
-NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
+_NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
 {
         if (((void *)port) < IO_SPACE_BOUNDARY) {
@@ -234 +234 @@
 }
 
-NO_TRACE static inline uint32_t read_eflags(void)
+_NO_TRACE static inline uint32_t read_eflags(void)
 {
         uint32_t eflags;
@@ -247 +247 @@
 }
 
-NO_TRACE static inline void write_eflags(uint32_t eflags)
+_NO_TRACE static inline void write_eflags(uint32_t eflags)
 {
         asm volatile (
@@ -261 +261 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_read(void)
+_NO_TRACE static inline ipl_t interrupts_read(void)
 {
         return (ipl_t) read_eflags();
@@ -273 +273 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_enable(void)
+_NO_TRACE static inline ipl_t interrupts_enable(void)
 {
         ipl_t ipl = interrupts_read();
@@ -289 +289 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_disable(void)
+_NO_TRACE static inline ipl_t interrupts_disable(void)
 {
         ipl_t ipl = interrupts_read();
@@ -305 +305 @@
  *
  */
-NO_TRACE static inline void interrupts_restore(ipl_t ipl)
+_NO_TRACE static inline void interrupts_restore(ipl_t ipl)
 {
         write_eflags((uint32_t) ipl);
@@ -315 +315 @@
  *
  */
-NO_TRACE static inline bool interrupts_disabled(void)
+_NO_TRACE static inline bool interrupts_disabled(void)
 {
         return ((read_eflags() & EFLAGS_IF) == 0);
@@ -323 +323 @@
 
 /** Write to MSR */
-NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
+_NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
 {
         asm volatile (
@@ -333 +333 @@
 }
 
-NO_TRACE static inline uint64_t read_msr(uint32_t msr)
+_NO_TRACE static inline uint64_t read_msr(uint32_t msr)
 {
         uint32_t ax, dx;
@@ -356 +356 @@
  *
  */
-NO_TRACE static inline uintptr_t get_stack_base(void)
+_NO_TRACE static inline uintptr_t get_stack_base(void)
 {
         uintptr_t v;
@@ -374 +374 @@
  *
  */
-NO_TRACE static inline void invlpg(uintptr_t addr)
+_NO_TRACE static inline void invlpg(uintptr_t addr)
 {
         asm volatile (
@@ -387 +387 @@
  *
  */
-NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
+_NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
         asm volatile (
@@ -400 +400 @@
  *
  */
-NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
+_NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
         asm volatile (
@@ -413 +413 @@
  *
  */
-NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg)
+_NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg)
 {
         asm volatile (
@@ -426 +426 @@
  *
  */
-NO_TRACE static inline void tr_load(uint16_t sel)
+_NO_TRACE static inline void tr_load(uint16_t sel)
 {
         asm volatile (
@@ -439 +439 @@
  *
  */
-NO_TRACE static inline void gs_load(uint16_t sel)
+_NO_TRACE static inline void gs_load(uint16_t sel)
 {
         asm volatile (