Changeset 86ffa27f in mainline for kernel/arch/mips32/src/mm/tlb.c


Ignore:
Timestamp:
2011-08-07T11:21:44Z (13 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
cc574511
Parents:
15f3c3f (diff), e8067c0 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/src/mm/tlb.c

    r15f3c3f r86ffa27f  
    7373                tlbwi();
    7474        }
    75                
     75       
    7676        /*
    7777         * The kernel is going to make use of some wired
     
    386386                        ASSERT(pte->w || access != PF_ACCESS_WRITE);
    387387                        return pte;
    388                         break;
    389388                case AS_PF_DEFER:
    390389                        *pfrc = AS_PF_DEFER;
    391390                        return NULL;
    392                         break;
    393391                case AS_PF_FAULT:
    394392                        *pfrc = AS_PF_FAULT;
    395393                        return NULL;
    396                         break;
    397394                default:
    398395                        panic("Unexpected rc (%d).", rc);
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