Changeset 811770c in mainline for kernel/arch/amd64/src/cpu/cpu.c
- Timestamp:
- 2016-05-05T12:06:04Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 57c2a87
- Parents:
- 0f17bff
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/cpu/cpu.c
r0f17bff r811770c 76 76 void cpu_setup_fpu(void) 77 77 { 78 asm volatile ( 79 "movq %%cr0, %%rax\n" 80 "btsq $1, %%rax\n" /* cr0.mp */ 81 "btrq $2, %%rax\n" /* cr0.em */ 82 "movq %%rax, %%cr0\n" 83 84 "movq %%cr4, %%rax\n" 85 "bts $9, %%rax\n" /* cr4.osfxsr */ 86 "movq %%rax, %%cr4\n" 87 ::: "%rax" 88 ); 78 write_cr0((read_cr0() & ~CR0_EM) | CR0_MP); 79 write_cr4(read_cr4() | CR4_OSFXSR); 89 80 } 90 81 … … 97 88 void fpu_disable(void) 98 89 { 99 asm volatile ( 100 "mov %%cr0, %%rax\n" 101 "bts $3, %%rax\n" 102 "mov %%rax, %%cr0\n" 103 ::: "%rax" 104 ); 90 write_cr0(read_cr0() | CR0_TS); 105 91 } 106 92 107 93 void fpu_enable(void) 108 94 { 109 asm volatile ( 110 "mov %%cr0, %%rax\n" 111 "btr $3, %%rax\n" 112 "mov %%rax, %%cr0\n" 113 ::: "%rax" 114 ); 95 write_cr0(read_cr0() & ~CR0_TS); 115 96 } 116 97
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