Changeset 6843a9c in mainline for uspace/drv/bus/usb/uhci/res.c
- Timestamp:
- 2012-06-29T13:02:14Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 722912e
- Parents:
- ba72f2b (diff), 0bbd13e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - File:
-
- 1 moved
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uspace/drv/bus/usb/uhci/res.c
rba72f2b r6843a9c 26 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 27 */ 28 29 28 /** 30 29 * @addtogroup drvusbuhcihc … … 39 38 #include <assert.h> 40 39 #include <devman.h> 41 #include <device/hw_res.h> 40 #include <device/hw_res_parsed.h> 41 #include <device/pci.h> 42 42 43 #include <usb/debug.h> 44 #include <pci_dev_iface.h> 45 46 #include "pci.h" 43 #include "res.h" 47 44 48 45 /** Get I/O address of registers and IRQ for given device. … … 54 51 * @return Error code. 55 52 */ 56 int pci_get_my_registers(const ddf_dev_t *dev,53 int get_my_registers(const ddf_dev_t *dev, 57 54 uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no) 58 55 { 59 56 assert(dev); 60 assert(io_reg_address);61 assert(io_reg_size);62 assert(irq_no);63 57 64 58 async_sess_t *parent_sess = … … 68 62 return ENOMEM; 69 63 70 hw_resource_list_t hw_resources; 71 const int rc = hw_res_get_resource_list(parent_sess, &hw_resources); 64 hw_res_list_parsed_t hw_res; 65 hw_res_list_parsed_init(&hw_res); 66 const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); 72 67 async_hangup(parent_sess); 73 if (r c!= EOK) {74 return r c;68 if (ret != EOK) { 69 return ret; 75 70 } 76 71 77 uintptr_t io_address = 0; 78 size_t io_size = 0; 79 bool io_found = false; 72 /* We want one irq and one io range. */ 73 if (hw_res.irqs.count != 1 || hw_res.io_ranges.count != 1) { 74 hw_res_list_parsed_clean(&hw_res); 75 return EINVAL; 76 } 80 77 81 int irq = 0; 82 bool irq_found = false; 78 if (io_reg_address) 79 *io_reg_address = hw_res.io_ranges.ranges[0].address; 80 if (io_reg_size) 81 *io_reg_size = hw_res.io_ranges.ranges[0].size; 82 if (irq_no) 83 *irq_no = hw_res.irqs.irqs[0]; 83 84 84 for (size_t i = 0; i < hw_resources.count; i++) { 85 const hw_resource_t *res = &hw_resources.resources[i]; 86 switch (res->type) { 87 case INTERRUPT: 88 irq = res->res.interrupt.irq; 89 irq_found = true; 90 usb_log_debug2("Found interrupt: %d.\n", irq); 91 break; 92 case IO_RANGE: 93 io_address = res->res.io_range.address; 94 io_size = res->res.io_range.size; 95 usb_log_debug2("Found io: %" PRIx64" %zu.\n", 96 res->res.io_range.address, res->res.io_range.size); 97 io_found = true; 98 break; 99 default: 100 break; 101 } 102 } 103 free(hw_resources.resources); 104 105 if (!io_found || !irq_found) 106 return ENOENT; 107 108 *io_reg_address = io_address; 109 *io_reg_size = io_size; 110 *irq_no = irq; 111 85 hw_res_list_parsed_clean(&hw_res); 112 86 return EOK; 113 87 } 114 /*----------------------------------------------------------------------------*/ 88 115 89 /** Call the PCI driver with a request to enable interrupts 116 90 * … … 118 92 * @return Error code. 119 93 */ 120 int pci_enable_interrupts(const ddf_dev_t *device)94 int enable_interrupts(const ddf_dev_t *device) 121 95 { 122 96 async_sess_t *parent_sess = … … 131 105 return enabled ? EOK : EIO; 132 106 } 133 /*----------------------------------------------------------------------------*/ 107 134 108 /** Call the PCI driver with a request to clear legacy support register 135 109 * … … 137 111 * @return Error code. 138 112 */ 139 int pci_disable_legacy(const ddf_dev_t *device)113 int disable_legacy(const ddf_dev_t *device) 140 114 { 141 115 assert(device); 142 116 143 async_sess_t *parent_sess = 144 devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, 145 IPC_FLAG_BLOCKING); 117 async_sess_t *parent_sess = devman_parent_device_connect( 118 EXCHANGE_SERIALIZE, device->handle, IPC_FLAG_BLOCKING); 146 119 if (!parent_sess) 147 120 return ENOMEM; 148 121 149 /* See UHCI design guide for these values p.45, 150 * write all WC bits in USB legacy register */ 151 const sysarg_t address = 0xc0; 152 const sysarg_t value = 0xaf00; 122 /* See UHCI design guide page 45 for these values. 123 * Write all WC bits in USB legacy register */ 124 const int rc = pci_config_space_write_16(parent_sess, 0xc0, 0xaf00); 153 125 154 async_exch_t *exch = async_exchange_begin(parent_sess);155 156 const int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),157 IPC_M_CONFIG_SPACE_WRITE_16, address, value);158 159 async_exchange_end(exch);160 126 async_hangup(parent_sess); 161 162 127 return rc; 163 128 }
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