Changeset 666773c in mainline for kernel/arch/ia64/src/ia64.c
- Timestamp:
- 2008-12-31T15:33:29Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9805cde
- Parents:
- d8c0dc5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/src/ia64.c
rd8c0dc5 r666773c 63 63 #include <sysinfo/sysinfo.h> 64 64 65 /* NS16550 as a COM 1*/66 #define NS16550_IRQ (4+LEGACY_INTERRUPT_BASE)67 #define NS16550_PORT 65 /* NS16550 as a COM 1 */ 66 #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) 67 #define NS16550_PORT 0x3f8 68 68 69 69 bootinfo_t *bootinfo; 70 70 71 static uint64_t iosapic_base =0xfec00000;71 static uint64_t iosapic_base = 0xfec00000; 72 72 73 73 void arch_pre_main(void) … … 80 80 81 81 for (i = 0; i < init.cnt; i++) { 82 init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; 82 init.tasks[i].addr = 83 ((unsigned long) bootinfo->taskmap.tasks[i].addr) | 84 VRN_MASK; 83 85 init.tasks[i].size = bootinfo->taskmap.tasks[i].size; 84 86 } … … 87 89 void arch_pre_mm_init(void) 88 90 { 89 /* Set Interruption Vector Address (i.e. location of interruption vector table). */ 91 /* 92 * Set Interruption Vector Address (i.e. location of interruption vector 93 * table). 94 */ 90 95 iva_write((uintptr_t) &ivt); 91 96 srlz_d(); … … 96 101 { 97 102 98 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) |FW_OFFSET;103 uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; 99 104 int i; 100 105 101 106 int myid,myeid; 102 107 103 myid =ia64_get_cpu_id();104 myeid =ia64_get_cpu_eid();105 106 for (i=0;i<16;i++)107 {108 109 if(i==2) continue; //Disable Cascade interrupt110 ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;111 srlz_d();112 ((uint32_t*)(IOSAPIC+0x10))[0]=LEGACY_INTERRUPT_BASE+i;113 srlz_d();114 ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;115 srlz_d();116 ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32);108 myid = ia64_get_cpu_id(); 109 myeid = ia64_get_cpu_eid(); 110 111 for (i = 0; i < 16; i++) { 112 if (i == 2) 113 continue; /* Disable Cascade interrupt */ 114 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; 115 srlz_d(); 116 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; 117 srlz_d(); 118 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; 119 srlz_d(); 120 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | 121 myeid << (48 - 32); 117 122 srlz_d(); 118 123 } … … 123 128 void arch_post_mm_init(void) 124 129 { 125 if(config.cpu_active==1) 126 { 130 if (config.cpu_active == 1) { 127 131 iosapic_init(); 128 129 132 irq_init(INR_COUNT, INR_COUNT); 130 133 #ifdef SKI … … 167 170 #endif 168 171 169 170 void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));171 void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))172 {173 return;174 }175 176 177 172 void arch_post_smp_init(void) 178 173 { 179 180 { 181 /* 182 * Create thread that polls keyboard. 183 */ 184 #ifdef SKI 185 thread_t *t; 186 t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); 187 if (!t) 188 panic("cannot create kkbdpoll\n"); 189 thread_ready(t); 174 thread_t *t; 175 176 /* 177 * Create thread that polls keyboard. 178 */ 179 #ifdef SKI 180 t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); 181 if (!t) 182 panic("cannot create kkbdpoll\n"); 183 thread_ready(t); 190 184 #endif 191 185 192 186 #ifdef I460GX 193 devno_t kbd = device_assign_devno(); 194 /* keyboard controller */ 195 196 #ifdef CONFIG_NS16550 197 ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1 198 #else 199 devno_t mouse = device_assign_devno(); 200 i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); 201 #endif 202 thread_t *t; 203 t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); 204 if (!t) 205 panic("cannot create kkbdpoll\n"); 206 thread_ready(t); 207 208 #endif 209 210 } 211 187 devno_t kbd = device_assign_devno(); 188 189 #ifdef CONFIG_NS16550 190 ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); 191 #else 192 devno_t mouse = device_assign_devno(); 193 i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); 194 #endif 195 t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); 196 if (!t) 197 panic("cannot create kkbdpoll\n"); 198 thread_ready(t); 199 #endif 200 212 201 sysinfo_set_item_val("ia64_iospace", NULL, true); 213 202 sysinfo_set_item_val("ia64_iospace.address", NULL, true); 214 203 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); 215 216 217 218 219 220 204 } 221 205 … … 229 213 psr.value = psr_read(); 230 214 psr.cpl = PL_USER; 231 psr.i = true; 215 psr.i = true; /* start with interrupts enabled */ 232 216 psr.ic = true; 233 psr.ri = 0; 234 psr.bn = 1; 217 psr.ri = 0; /* start with instruction #0 */ 218 psr.bn = 1; /* start in bank 0 */ 235 219 236 220 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); … … 238 222 rsc.be = false; 239 223 rsc.pl = PL_USER; 240 rsc.mode = 3; 224 rsc.mode = 3; /* eager mode */ 241 225 242 226 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, 243 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),244 ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,245 (uintptr_t) kernel_uarg->uspace_uarg,246 247 248 while (1) {227 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - 228 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), 229 ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, 230 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); 231 232 while (1) 249 233 ; 250 }251 234 } 252 235 … … 268 251 ski_kbd_grab(); 269 252 #else 270 #ifdef CONFIG_NS16550 271 ns16550_grab(); 272 #else 273 i8042_grab(); 274 #endif 275 #endif 276 } 253 #ifdef CONFIG_NS16550 254 ns16550_grab(); 255 #else 256 i8042_grab(); 257 #endif 258 #endif 259 } 260 277 261 /** Return console to userspace 278 262 * … … 283 267 ski_kbd_release(); 284 268 #else 285 #ifdef CONFIG_NS16550 286 ns16550_release(); 287 #else 288 i8042_release(); 289 #endif 290 269 #ifdef CONFIG_NS16550 270 ns16550_release(); 271 #else 272 i8042_release(); 273 #endif 291 274 #endif 292 275 } … … 294 277 void arch_reboot(void) 295 278 { 296 outb(0x64,0xfe); 297 while (1); 279 outb(0x64, 0xfe); 280 while (1) 281 ; 298 282 } 299 283
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