Changeset 655f70b in mainline for kernel/arch/ppc32/src/mm/tlb.c


Ignore:
Timestamp:
2011-05-23T20:40:49Z (13 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d4c472b
Parents:
f66b565
Message:

ppc32: reimplement tlb_invalidate_all, this finally allows a real-world PowerPC G4 machine to operate correctly
(the original inline assembly with the .rept directive did not inline correctly and it wiped out the first TLB entry 64 times instead of wiping all 64 entries)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ppc32/src/mm/tlb.c

    rf66b565 r655f70b  
    8181void tlb_invalidate_all(void)
    8282{
    83         uint32_t index;
     83        asm volatile (
     84                "sync\n"
     85        );
     86       
     87        for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
     88                asm volatile (
     89                        "tlbie %[i]\n"
     90                        :: [i] "r" (i)
     91                );
     92        }
    8493       
    8594        asm volatile (
    86                 "li %[index], 0\n"
    87                 "sync\n"
    88                
    89                 ".rept 64\n"
    90                 "       tlbie %[index]\n"
    91                 "       addi %[index], %[index], 0x1000\n"
    92                 ".endr\n"
    93                
    9495                "eieio\n"
    9596                "tlbsync\n"
    9697                "sync\n"
    97                 : [index] "=r" (index)
    9898        );
    9999}
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