Ignore:
Timestamp:
2013-10-15T17:05:26Z (11 years ago)
Author:
Jakub Klama <jakub.klama@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
f988a13
Parents:
a73ebf0
Message:

Implementation of IRQMP interrupt controller and UART drivers, part 2.
Modified kernel config files to reflect presence of new drivers.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/genarch/src/drivers/grlib_uart/grlib_uart.c

    ra73ebf0 r4d2dba7  
    5050static void grlib_uart_sendb(outdev_t *dev, uint8_t byte)
    5151{
     52        uint32_t reg;
    5253        grlib_uart_status_t *status;
    5354        grlib_uart_t *uart =
     
    5657        /* Wait for space becoming available in Tx FIFO. */
    5758        do {
    58                 status = pio_read_32(&uart->io->status);
     59                reg = pio_read_32(&uart->io->status);
     60                status = (grlib_uart_status_t *)&reg;
    5961        } while (status->tf != 0);
    6062
     
    8587static void grlib_uart_irq_handler(irq_t *irq)
    8688{
     89        uint32_t reg;
    8790        grlib_uart_t *uart = irq->instance;
    88         grlib_status_t status;
     91        grlib_uart_status_t *status;
    8992
    90         status = (grlib_status_t)pio_read_32(&uart->io->status);
     93        reg = pio_read_32(&uart->io->status);
     94        status = (grlib_uart_status_t *)&reg;
    9195
    9296        while (status->dr != 0) {
    9397                uint32_t data = pio_read_32(&uart->io->data);
    94                 status = (grlib_status_t)pio_read_32(&uart->io->status);
     98                reg = pio_read_32(&uart->io->status);
     99                status = (grlib_uart_status_t *)&reg;
    95100                indev_push_character(uart->indev, data & 0xff);
    96101        }
     
    131136
    132137        /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
    133         grlib_control_t control =
     138        grlib_uart_control_t control =
    134139                { .fa = 1, .rf = 1, .tf = 1, .ri = 1,
    135140                  .te = 1, .re = 1};
    136141
    137         pio_write_32(&uart->io->control, control);
     142        uint32_t *reg = (uint32_t *)&control;
     143        pio_write_32(&uart->io->control, *reg);
    138144
    139145        link_initialize(&uart->parea.link);
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