Changeset 4d2dba7 in mainline for kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c

Timestamp:

2013-10-15T17:05:26Z (11 years ago)

Author:

Jakub Klama <jakub.klama@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f988a13

Parents:

a73ebf0

Message:

Implementation of IRQMP interrupt controller and UART drivers, part 2.
Modified kernel config files to reflect presence of new drivers.

File:

• kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c (modified) (1 diff)

kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c

@@ -38 +38 @@
 #include <arch/asm.h>
 
-void grlib_irqmp_init(grlib_irqmp_t *irqc, grlib_irqmp_regs_t *regs)
+#include <mm/km.h>
+
+void grlib_irqmp_init(grlib_irqmp_t *irqc, bootinfo_t *bootinfo)
 {
-        irqc->regs = regs;
+        irqc->regs = (void *) km_map(bootinfo->intc_base, PAGE_SIZE,
+            PAGE_NOT_CACHEABLE);
+
+        /* Mask all interrupts */
+        pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0);
 }
 
-unsigned grlib_irqmp_inum_get(grlib_irqmp_t *irqc)
+int grlib_irqmp_inum_get(grlib_irqmp_t *irqc)
 {
-        return 0;
+        int i;
+        uint32_t pending = pio_read_32(&irqc->regs->pending);
+
+        for (i = 1; i < 16; i++) {
+                if (pending & (1 << i))
+                        return i;
+        }
+
+        return -1;
 }
 
-void grlib_irqmp_clear(grlib_irqmp_t *irqc, unsigned inum)
+void grlib_irqmp_clear(grlib_irqmp_t *irqc, int inum)
 {
+        pio_write_32(&irqc->regs->clear, (1 << inum));
 }
 
-void grlib_irqmp_src_enable(grlib_irqmp_t *irqc, unsigned src)
+void grlib_irqmp_mask(grlib_irqmp_t *irqc, int src)
 {
+        uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
+
+        mask &= ~(1 << src);
+
+        pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
 }
 
-void grlib_irqmp_src_disable(grlib_irqmp_t *irqc, unsigned src)
+void grlib_irqmp_unmask(grlib_irqmp_t *irqc, int src)
 {
+        uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
+
+        mask |= (1 << src);
+
+        pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
 }