Changeset 46eb2c4 in mainline for uspace/drv/bus/pci/pciintel/pci.c


Ignore:
Timestamp:
2013-09-12T12:25:43Z (11 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
8049b79
Parents:
eeb5cc2
Message:

Use pio_enable_resource() in pci.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/pci/pciintel/pci.c

    reeb5cc2 r46eb2c4  
    256256        fibril_mutex_lock(&bus->conf_mutex);
    257257
    258         pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
     258        pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
    259259
    260260        /*
     
    263263         * support shorter PIO reads offset from this register.
    264264         */
    265         val = uint32_t_le2host(pio_read_32(bus->conf_data_port));
     265        val = uint32_t_le2host(pio_read_32(bus->conf_data_reg));
    266266
    267267        switch (len) {
     
    299299                 * missing bits first.
    300300                 */
    301                 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
    302                 val = uint32_t_le2host(pio_read_32(bus->conf_data_port));
     301                pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
     302                val = uint32_t_le2host(pio_read_32(bus->conf_data_reg));
    303303        }
    304304       
     
    317317        }
    318318
    319         pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
    320         pio_write_32(bus->conf_data_port, host2uint32_t_le(val));
     319        pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
     320        pio_write_32(bus->conf_data_reg, host2uint32_t_le(val));
    321321       
    322322        fibril_mutex_unlock(&bus->conf_mutex);
     
    724724            hw_resources.resources[1].res.io_range.address);
    725725       
    726         bus->conf_io_addr =
    727             (uint32_t) hw_resources.resources[0].res.io_range.address;
    728         bus->conf_io_data =
    729             (uint32_t) hw_resources.resources[1].res.io_range.address;
    730        
    731         if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4,
    732             &bus->conf_addr_port)) {
     726        if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[0],
     727            (void **) &bus->conf_addr_reg)) {
    733728                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
    734729                rc = EADDRNOTAVAIL;
    735730                goto fail;
    736731        }
    737         if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4,
    738             &bus->conf_data_port)) {
     732        if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[1],
     733            (void **) &bus->conf_data_reg)) {
    739734                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
    740735                rc = EADDRNOTAVAIL;
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