Changeset 3bacee1 in mainline for uspace/drv/bus/usb/xhci/hc.c
- Timestamp:
- 2018-04-12T16:27:17Z (6 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/hc.c
r76d0981d r3bacee1 87 87 xhci_port_speed_t *speeds = hc->speeds; 88 88 89 for (xhci_extcap_t * ec = hc->xecp; ec; ec = xhci_extcap_next(ec)) {89 for (xhci_extcap_t * ec = hc->xecp; ec; ec = xhci_extcap_next(ec)) { 90 90 xhci_dump_extcap(ec); 91 91 switch (XHCI_REG_RD(ec, XHCI_EC_CAP_ID)) { … … 151 151 * mapping also for devices connected to hubs. 152 152 */ 153 if (psiv < ARRAY_SIZE(default_psiv_to_port_speed) 154 && default_psiv_to_port_speed[psiv].major == major155 && default_psiv_to_port_speed[psiv].minor == minor156 && default_psiv_to_port_speed[psiv].rx_bps == bps157 &&default_psiv_to_port_speed[psiv].tx_bps == bps) {153 if (psiv < ARRAY_SIZE(default_psiv_to_port_speed) && 154 default_psiv_to_port_speed[psiv].major == major && 155 default_psiv_to_port_speed[psiv].minor == minor && 156 default_psiv_to_port_speed[psiv].rx_bps == bps && 157 default_psiv_to_port_speed[psiv].tx_bps == bps) { 158 158 speeds[psiv] = default_psiv_to_port_speed[psiv]; 159 159 usb_log_debug("Assumed default %s speed of USB %u.", 160 160 usb_str_speed(speeds[psiv].usb_speed), major); 161 161 continue; 162 162 } … … 173 173 speeds[psiv].tx_bps = bps; 174 174 usb_log_debug("Speed %u set up for bps %" PRIu64 175 176 175 " / %" PRIu64 ".", psiv, speeds[psiv].rx_bps, 176 speeds[psiv].tx_bps); 177 177 } 178 178 } … … 384 384 code->rangecount = 1; 385 385 code->ranges[0] = (irq_pio_range_t) { 386 387 386 .base = RNGABS(hc->mmio_range), 387 .size = RNGSZ(hc->mmio_range), 388 388 }; 389 389 … … 391 391 memcpy(code->cmds, irq_commands, sizeof(irq_commands)); 392 392 393 void *intr0_iman = RNGABSPTR(hc->mmio_range) 394 + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF)395 +offsetof(xhci_rt_regs_t, ir[0]);396 void *usbsts = RNGABSPTR(hc->mmio_range) 397 + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH)398 +offsetof(xhci_op_regs_t, usbsts);393 void *intr0_iman = RNGABSPTR(hc->mmio_range) + 394 XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF) + 395 offsetof(xhci_rt_regs_t, ir[0]); 396 void *usbsts = RNGABSPTR(hc->mmio_range) + 397 XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH) + 398 offsetof(xhci_op_regs_t, usbsts); 399 399 400 400 code->cmds[0].addr = intr0_iman; … … 425 425 for (int i = 0; i <= (XHCI_LEGSUP_BIOS_TIMEOUT_US / XHCI_LEGSUP_POLLING_DELAY_1MS); i++) { 426 426 usb_log_debug("LEGSUP: elapsed: %i ms, bios: %x, os: %x", i, 427 428 427 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS), 428 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS)); 429 429 if (XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS) == 0) { 430 430 return XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS) == 1 ? EOK : EIO; … … 559 559 const uint32_t usbsts = XHCI_REG_RD_FIELD(&hc->op_regs->usbsts, 32); 560 560 561 return !(usbcmd & XHCI_REG_MASK(XHCI_OP_RS)) 562 || (usbsts & XHCI_REG_MASK(XHCI_OP_HCE))563 ||(usbsts & XHCI_REG_MASK(XHCI_OP_HSE));561 return !(usbcmd & XHCI_REG_MASK(XHCI_OP_RS)) || 562 (usbsts & XHCI_REG_MASK(XHCI_OP_HCE)) || 563 (usbsts & XHCI_REG_MASK(XHCI_OP_HSE)); 564 564 } 565 565 … … 589 589 struct timeval tv; 590 590 getuptime(&tv); 591 usb_log_debug("Microframe index wrapped (@%lu.%li, %" PRIu64" total).",591 usb_log_debug("Microframe index wrapped (@%lu.%li, %" PRIu64 " total).", 592 592 tv.tv_sec, tv.tv_usec, hc->wrap_count); 593 593 hc->wrap_time = ((uint64_t) tv.tv_sec) * 1000000 + ((uint64_t) tv.tv_usec); … … 634 634 errno_t err; 635 635 xhci_trb_t trb; 636 xhci_hc_t * 636 xhci_hc_t *const hc = arg; 637 637 assert(hc); 638 638 … … 654 654 */ 655 655 static void hc_run_event_ring(xhci_hc_t *hc, xhci_event_ring_t *event_ring, 656 656 xhci_interrupter_regs_t *intr) 657 657 { 658 658 errno_t err; … … 720 720 if (status) { 721 721 usb_log_error("Non-zero status after interrupt handling (%08x) " 722 722 " - missing something?", status); 723 723 } 724 724 } … … 766 766 { 767 767 return (2 * ep->base.endpoint) + 768 (ep->base.transfer_type == USB_TRANSFER_CONTROL769 ||ep->base.direction == USB_DIRECTION_IN);768 (ep->base.transfer_type == USB_TRANSFER_CONTROL || 769 ep->base.direction == USB_DIRECTION_IN); 770 770 } 771 771 772 772 void hc_ring_ep_doorbell(xhci_endpoint_t *ep, uint32_t stream_id) 773 773 { 774 xhci_device_t * 775 xhci_hc_t * 774 xhci_device_t *const dev = xhci_ep_to_dev(ep); 775 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 776 776 const uint8_t dci = endpoint_dci(ep); 777 777 const uint32_t target = (stream_id << 16) | (dci & 0x1ff); … … 786 786 { 787 787 errno_t err; 788 xhci_hc_t * 788 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 789 789 790 790 /* Prepare memory for the context */ … … 821 821 { 822 822 errno_t err; 823 xhci_hc_t * 823 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 824 824 xhci_cmd_t cmd; 825 825 … … 846 846 static errno_t create_configure_ep_input_ctx(xhci_device_t *dev, dma_buffer_t *dma_buf) 847 847 { 848 const xhci_hc_t * 848 const xhci_hc_t *hc = bus_to_hc(dev->base.bus); 849 849 const errno_t err = dma_buffer_alloc(dma_buf, XHCI_INPUT_CTX_SIZE(hc)); 850 850 if (err) … … 870 870 { 871 871 errno_t err = ENOMEM; 872 xhci_hc_t * 872 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 873 873 xhci_endpoint_t *ep0 = xhci_endpoint_get(dev->base.endpoints[0]); 874 874 … … 920 920 errno_t hc_configure_device(xhci_device_t *dev) 921 921 { 922 xhci_hc_t * 922 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 923 923 xhci_cmd_t cmd; 924 924 … … 945 945 errno_t hc_deconfigure_device(xhci_device_t *dev) 946 946 { 947 xhci_hc_t * 947 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 948 948 xhci_cmd_t cmd; 949 949 errno_t err; … … 972 972 errno_t hc_add_endpoint(xhci_endpoint_t *ep) 973 973 { 974 xhci_device_t * 974 xhci_device_t *const dev = xhci_ep_to_dev(ep); 975 975 const unsigned dci = endpoint_dci(ep); 976 976 xhci_cmd_t cmd; … … 984 984 xhci_input_ctx_t *ictx = ictx_dma_buf.virt; 985 985 986 xhci_hc_t * 986 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 987 987 XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci); 988 988 … … 1007 1007 errno_t hc_drop_endpoint(xhci_endpoint_t *ep) 1008 1008 { 1009 xhci_device_t * 1010 xhci_hc_t * 1009 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1010 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1011 1011 const unsigned dci = endpoint_dci(ep); 1012 1012 xhci_cmd_t cmd; … … 1043 1043 errno_t hc_update_endpoint(xhci_endpoint_t *ep) 1044 1044 { 1045 xhci_device_t * 1045 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1046 1046 const unsigned dci = endpoint_dci(ep); 1047 1047 xhci_cmd_t cmd; 1048 1048 1049 1049 dma_buffer_t ictx_dma_buf; 1050 xhci_hc_t * 1050 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1051 1051 1052 1052 errno_t err = dma_buffer_alloc(&ictx_dma_buf, XHCI_INPUT_CTX_SIZE(hc)); … … 1078 1078 errno_t hc_stop_endpoint(xhci_endpoint_t *ep) 1079 1079 { 1080 xhci_device_t * 1080 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1081 1081 const unsigned dci = endpoint_dci(ep); 1082 xhci_hc_t * 1082 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1083 1083 xhci_cmd_t cmd; 1084 1084 errno_t err; … … 1104 1104 errno_t hc_reset_endpoint(xhci_endpoint_t *ep) 1105 1105 { 1106 xhci_device_t * 1106 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1107 1107 const unsigned dci = endpoint_dci(ep); 1108 xhci_hc_t * 1108 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1109 1109 xhci_cmd_t cmd; 1110 1110 errno_t err; … … 1126 1126 errno_t hc_reset_ring(xhci_endpoint_t *ep, uint32_t stream_id) 1127 1127 { 1128 xhci_device_t * 1128 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1129 1129 const unsigned dci = endpoint_dci(ep); 1130 1130 uintptr_t addr; … … 1135 1135 xhci_trb_ring_reset_dequeue_state(ring, &addr); 1136 1136 1137 xhci_hc_t * 1137 xhci_hc_t *const hc = bus_to_hc(endpoint_get_bus(&ep->base)); 1138 1138 1139 1139 xhci_cmd_init(&cmd, XHCI_CMD_SET_TR_DEQUEUE_POINTER);
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