Changeset 22f0561 in mainline for kernel/arch/ia64/src/mm/tlb.c
- Timestamp:
- 2011-12-31T00:12:58Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2107e79, c520034
- Parents:
- efb48eb
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/src/mm/tlb.c
refb48eb r22f0561 52 52 #include <arch.h> 53 53 #include <interrupt.h> 54 55 #define IO_FRAME_BASE 0xFFFFC000000 54 #include <arch/legacyio.h> 56 55 57 56 /** Invalidate all TLB entries. */ … … 530 529 static int try_memmap_io_insertion(uintptr_t va, istate_t *istate) 531 530 { 532 if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 <<IO_PAGE_WIDTH))) {531 if ((va >= LEGACYIO_USER_BASE) && (va < LEGACYIO_USER_BASE + (1 << LEGACYIO_PAGE_WIDTH))) { 533 532 if (TASK) { 534 uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>535 USPACE_IO_PAGE_WIDTH;533 uint64_t io_page = (va & ((1 << LEGACYIO_PAGE_WIDTH) - 1)) >> 534 LEGACYIO_SINGLE_PAGE_WIDTH; 536 535 537 536 if (is_io_page_accessible(io_page)) { 538 537 uint64_t page, frame; 539 538 540 page = IO_OFFSET+541 (1 << USPACE_IO_PAGE_WIDTH) * io_page;542 frame = IO_FRAME_BASE +543 (1 << USPACE_IO_PAGE_WIDTH) * io_page;539 page = LEGACYIO_USER_BASE + 540 (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page; 541 frame = LEGACYIO_PHYS_BASE + 542 (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page; 544 543 545 544 tlb_entry_t entry; … … 555 554 entry.ar = AR_READ | AR_WRITE; 556 555 entry.ppn = frame >> PPN_SHIFT; 557 entry.ps = USPACE_IO_PAGE_WIDTH;556 entry.ps = LEGACYIO_SINGLE_PAGE_WIDTH; 558 557 559 558 dtc_mapping_insert(page, TASK->as->asid, entry);
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