Changeset 1433ecda in mainline for kernel/arch/ia32/include/arch/atomic.h
- Timestamp:
- 2018-04-04T15:42:37Z (6 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2c4e1cc
- Parents:
- 47b2d7e3
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/arch/atomic.h
r47b2d7e3 r1433ecda 46 46 #ifdef CONFIG_SMP 47 47 asm volatile ( 48 49 50 ); 51 #else 52 asm volatile ( 53 54 48 "lock incl %[count]\n" 49 : [count] "+m" (val->count) 50 ); 51 #else 52 asm volatile ( 53 "incl %[count]\n" 54 : [count] "+m" (val->count) 55 55 ); 56 56 #endif /* CONFIG_SMP */ … … 61 61 #ifdef CONFIG_SMP 62 62 asm volatile ( 63 64 65 ); 66 #else 67 asm volatile ( 68 69 63 "lock decl %[count]\n" 64 : [count] "+m" (val->count) 65 ); 66 #else 67 asm volatile ( 68 "decl %[count]\n" 69 : [count] "+m" (val->count) 70 70 ); 71 71 #endif /* CONFIG_SMP */ … … 77 77 78 78 asm volatile ( 79 80 81 79 "lock xaddl %[r], %[count]\n" 80 : [count] "+m" (val->count), 81 [r] "+r" (r) 82 82 ); 83 83 … … 90 90 91 91 asm volatile ( 92 93 94 92 "lock xaddl %[r], %[count]\n" 93 : [count] "+m" (val->count), 94 [r] "+r" (r) 95 95 ); 96 96 … … 106 106 107 107 asm volatile ( 108 109 110 108 "xchgl %[v], %[count]\n" 109 : [v] "+r" (v), 110 [count] "+m" (val->count) 111 111 ); 112 112 … … 122 122 preemption_disable(); 123 123 asm volatile ( 124 124 "0:\n" 125 125 #ifndef PROCESSOR_i486 126 127 #endif 128 129 130 131 132 133 134 135 136 137 126 "pause\n" /* Pentium 4's HT love this instruction */ 127 #endif 128 "mov %[count], %[tmp]\n" 129 "testl %[tmp], %[tmp]\n" 130 "jnz 0b\n" /* lightweight looping on locked spinlock */ 131 132 "incl %[tmp]\n" /* now use the atomic operation */ 133 "xchgl %[count], %[tmp]\n" 134 "testl %[tmp], %[tmp]\n" 135 "jnz 0b\n" 136 : [count] "+m" (val->count), 137 [tmp] "=&r" (tmp) 138 138 ); 139 139
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