Ignore:
Timestamp:
2018-07-18T18:56:16Z (6 years ago)
Author:
Jiří Zárevúcky <jiri.zarevucky@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
40abf56
Parents:
9b1baac
git-author:
Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-18 14:25:11)
git-committer:
Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-18 18:56:16)
Message:

Adds

  • tcb_raw_get(), which returns the value of the TP register without any offsets applied to it,
  • tcb_raw_set(), which does the opposite,
  • tcb_is_set(), which returns true iff the register is not NULL,
  • tcb_reset(), which sets the register to NULL.

Used for debug assertions.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • uspace/lib/c/arch/arm32/include/libarch/tls.h

    r9b1baac r0b05082  
    4242
    4343/** Offsets for accessing thread-local variables are shifted 8 bytes higher. */
    44 #define ARM_TP_OFFSET  (-8)
     44#define ARCH_TP_OFFSET  (sizeof(tcb_t) - 8)
    4545
    4646/** TCB (Thread Control Block) struct.
    … …  
    5353} tcb_t;
    5454
    55 
    56 /** Sets TLS address to the r9 register.
    57  *
    58  *  @param tcb          TCB (TLS starts behind)
    59  */
    60 static inline void __tcb_set(tcb_t *tcb)
     55static inline void *__tcb_raw_get(void)
    6156{
    62         uint8_t *tls = (uint8_t *) tcb;
    63         tls += sizeof(tcb_t) + ARM_TP_OFFSET;
    64         asm volatile (
    65             "mov r9, %0"
    66             :
    67             : "r" (tls)
    68         );
     57        uint8_t *ret;
     58        asm volatile ("mov %0, r9" : "=r" (ret));
     59        return ret;
    6960}
    7061
    71 
    72 /** Returns TCB address.
    73  *
    74  * @return              TCB address (starts before TLS which address is stored
    75  *                      in r9 register).
    76  */
    77 static inline tcb_t *__tcb_get(void)
     62static inline void __tcb_raw_set(void *tls)
    7863{
    79         uint8_t *ret;
    80         asm volatile (
    81             "mov %0, r9"
    82             : "=r" (ret)
    83         );
    84         return (tcb_t *) (ret - ARM_TP_OFFSET - sizeof(tcb_t));
     64        asm volatile ("mov r9, %0" :: "r" (tls));
    8565}
    86 
    8766
    8867/** Returns TLS address stored.
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