Changeset 0b05082 in mainline for uspace/lib/c/arch/amd64/include/libarch/tls.h

Timestamp:

2018-07-18T18:56:16Z (6 years ago)

Author:

Jiří Zárevúcky <jiri.zarevucky@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

40abf56

Parents:

9b1baac

git-author:

Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-18 14:25:11)

git-committer:

Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-18 18:56:16)

Message:

Adds

• tcb_raw_get(), which returns the value of the TP register without any offsets applied to it,
• tcb_raw_set(), which does the opposite,
• tcb_is_set(), which returns true iff the register is not NULL,
• tcb_reset(), which sets the register to NULL.

Used for debug assertions.

File:

• uspace/lib/c/arch/amd64/include/libarch/tls.h (modified) (2 diffs)

uspace/lib/c/arch/amd64/include/libarch/tls.h

@@ -38 +38 @@
 #define CONFIG_TLS_VARIANT_2
 
+#define ARCH_TP_OFFSET 0
+
 #include <libc.h>
 
@@ -45 +47 @@
 } tcb_t;
 
-static inline void __tcb_set(tcb_t *tcb)
+static inline void __tcb_raw_set(void *tls)
 {
-        asm volatile ("movq %0, %%fs:0" :: "r" (tcb));
+        asm volatile ("movq %0, %%fs:0" :: "r" (tls));
 }
 
-static inline tcb_t *__tcb_get(void)
+static inline void *__tcb_raw_get(void)
 {
-        tcb_t *retval;
-
+        void *retval;
         asm volatile ("movq %%fs:0, %0" : "=r" (retval));
         return retval;