Changeset 0747468 in mainline for kernel/arch/arm32/include/mm/page.h

Timestamp:

2012-07-14T09:27:31Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

97c7682

Parents:

ee685630

Message:

arm32: Move common definitions to common header.

Restrict including of arch specific headers.

File:

• kernel/arch/arm32/include/mm/page.h (modified) (2 diffs)

kernel/arch/arm32/include/mm/page.h

@@ -37 +37 @@
 #define KERN_arm32_PAGE_H_
 
+#include <arch/mm/frame.h>
+#include <mm/mm.h>
+#include <arch/exception.h>
+#include <trace.h>
+
+#define PAGE_WIDTH      FRAME_WIDTH
+#define PAGE_SIZE       FRAME_SIZE
+
 #ifdef MACHINE_beagleboardxm
 #ifndef __ASM__
@@ -55 +63 @@
 #endif
 
+/* Number of entries in each level. */
+#define PTL0_ENTRIES_ARCH       (1 << 12)       /* 4096 */
+#define PTL1_ENTRIES_ARCH       0
+#define PTL2_ENTRIES_ARCH       0
+/* coarse page tables used (256 * 4 = 1KB per page) */
+#define PTL3_ENTRIES_ARCH       (1 << 8)        /* 256 */
+
+/* Page table sizes for each level. */
+#define PTL0_SIZE_ARCH          FOUR_FRAMES
+#define PTL1_SIZE_ARCH          0
+#define PTL2_SIZE_ARCH          0
+#define PTL3_SIZE_ARCH          ONE_FRAME
+
+/* Macros calculating indices into page tables for each level. */
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 20) & 0xfff)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x0ff)
+
+/* Get PTE address accessors for each level. */
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
+        ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10))
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
+        (ptl1)
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
+        (ptl2)
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
+        ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12))
+
+/* Set PTE address accessors for each level. */
+#define SET_PTL0_ADDRESS_ARCH(ptl0) \
+        (set_ptl0_addr((pte_t *) (ptl0)))
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
+        (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10)
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
+        (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12)
+
+/* Get PTE flags accessors for each level. */
+#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
+        get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i))
+#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
+        PAGE_PRESENT
+#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
+        PAGE_PRESENT
+#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
+        get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i))
+
+/* Set PTE flags accessors for each level. */
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
+        set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x))
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
+        set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x))
+
 #if defined(PROCESSOR_armv7_a)
 #include "page_armv7.h"