Changeset ffc277e in mainline for arch/mips/src/fpu_context.c

Timestamp:

2005-09-10T00:52:13Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f3a6c8e5

Parents:

b02e5d1

Message:

Cleanup of makefiles to have common options in one main makefile.

Add simple build process for different simulators for MIPS.
Added FPU context & lazy FPU context switching to MIPS.
Cleanup of MIPS linker script.
Moved MIPS kernel above 1MB. Not tested on real machine yet, but it might help.

There is something broken with gcc inlined memcpy (either simulator or gcc), it is disabled on BigEndian mips now.

File:

• arch/mips/src/fpu_context.c (modified) (1 diff)

arch/mips/src/fpu_context.c

@@ -29 +29 @@
 
 #include <fpu_context.h>
+#include <arch.h>
+#include <arch/cp0.h>
 
-void fpu_context_save(fpu_context_t *fctx)
-{
+void fpu_disable(void)
+{       
+#ifdef HAVE_FPU
+        cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
+        if (THREAD && THREAD->pstate)
+                THREAD->pstate->status &= ~cp0_status_fpu_bit;
+#endif
 }
 
-
-void fpu_context_restore(fpu_context_t *fctx)
+void fpu_enable(void)
 {
+#ifdef HAVE_FPU
+        cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
+        if (THREAD && THREAD->pstate)
+                THREAD->pstate->status |= cp0_status_fpu_bit;
+#endif
 }
 
+void fpu_init(void)
+{
+        /* TODO: Zero all registers */
+}