Changeset fca4207 in mainline for libc/arch/ppc32/include/thread.h

Timestamp:

2006-05-04T11:04:23Z (20 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4a7c273

Parents:

f33cb0b9

Message:

preliminary TLS & pthread support for ppc32

File:

• libc/arch/ppc32/include/thread.h (modified) (2 diffs)

libc/arch/ppc32/include/thread.h

@@ -30 +30 @@
 #define __LIBC__ppc32__THREAD_H__
 
+/* I did not find any specification (neither MIPS nor PowerPC), but
+ * as I found it
+ * - it uses Variant II
+ * - TCB is at Address(First TLS Block)+0x7000.
+ * - DTV is at Address(First TLS Block)+0x8000
+ * - What would happen if the TLS data was larger then 0x7000?
+ * - The linker never accesses DTV directly, has the second definition any
+ *   sense?
+ * We will make it this way:
+ * - TCB is at TP-0x7000-sizeof(tcb)
+ * - No assumption about DTV etc., but it will not have a fixed address
+ */
+#define PPC_TP_OFFSET 0x7000
+
 typedef struct {
         void *pst_data;
@@ -36 +50 @@
 static inline void __tcb_set(tcb_t *tcb)
 {
+        void *tp = tcb;
+        tp += PPC_TP_OFFSET + sizeof(tcb_t);
+        
+        asm volatile (
+                "mr %%r2, %0\n"
+                :
+                : "r" (tp)
+        );
 }
 
 static inline tcb_t * __tcb_get(void)
 {
+        void * retval;
+        
+        asm volatile (
+                "mr %0, %%r2\n"
+                : "=r" (retval)
+        );
+
+        return (tcb_t *)(retval - PPC_TP_OFFSET - sizeof(tcb_t));
 }