Changeset f6f22cdb in mainline for boot/arch/sparc32/include/arch.h

Timestamp:

2013-12-27T18:45:56Z (12 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

32e8cd1

Parents:

e47ed05

Message:

code revision
coding style changes

File:

• boot/arch/sparc32/include/arch.h (modified) (2 diffs)

boot/arch/sparc32/include/arch.h

@@ -30 +30 @@
 #define BOOT_sparc32_ARCH_H
 
-#define PTL0_ENTRIES    256
-#define PTL0_SHIFT      24
-#define PTL0_SIZE       (1 << 24)
-#define PTL0_ENTRY_SIZE 4
+#define PTL0_ENTRIES     256
+#define PTL0_SHIFT       24
+#define PTL0_SIZE        (1 << 24)
+#define PTL0_ENTRY_SIZE  4
 
 /* ASI assignments: */
-#define ASI_CACHEMISS   0x01
-#define ASI_CACHECTRL   0x02
-#define ASI_MMUREGS     0x19
-#define ASI_MMUBYPASS   0x1c
+#define ASI_CACHEMISS  0x01
+#define ASI_CACHECTRL  0x02
+#define ASI_MMUREGS    0x19
+#define ASI_MMUBYPASS  0x1c
 
 /*
- * Address where the boot stage image starts (beginning of usable physical
- * memory).
+ * Address where the boot stage image starts
+ * (beginning of usable physical memory).
  */
-#define BOOT_BASE       0x40000000
-#define BOOT_OFFSET     (BOOT_BASE + 0xa00000)
 
-#define PA_OFFSET 0x40000000
+#define BOOT_BASE   0x40000000
+#define BOOT_OFFSET (BOOT_BASE + 0xa00000)
+
+#define PA_OFFSET  0x40000000
 
 #ifndef __ASM__
@@ -56 +57 @@
 #endif
 
-
 #endif