Changeset edebc15c in mainline for kernel/arch/mips32/include/drivers/serial.h

Timestamp:

2008-07-27T03:50:53Z (17 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4541ae4

Parents:

5e8ddf5

Message:

physical memory detection in MSIM (discontinous regions supported)
remove Sgi Indy (ARC) support — it was unmaintaned, untested for years and without uspace support

File:

• kernel/arch/mips32/include/drivers/serial.h (modified) (2 diffs)

kernel/arch/mips32/include/drivers/serial.h

@@ -38 +38 @@
 #include <console/chardev.h>
 
+#define SERIAL_ADDRESS    0xB8000000
+
 #define SERIAL_MAX        4
 #define SERIAL_COM1       0x3f8
@@ -44 +46 @@
 #define SERIAL_COM2_IRQ   3
 
-#define P_WRITEB(where,what)     (*((volatile char *) (0xB8000000+where))=what)
-#define P_READB(where)           (*((volatile char *)(0xB8000000+where)))
+#define P_WRITEB(where, what)     (*((volatile char *) (SERIAL_ADDRESS + where)) = what)
+#define P_READB(where)            (*((volatile char *) (SERIAL_ADDRESS + where)))
 
-#define SERIAL_READ(x)           P_READB(x)
-#define SERIAL_WRITE(x,c)        P_WRITEB(x,c)
+#define SERIAL_READ(x)            P_READB(x)
+#define SERIAL_WRITE(x, c)        P_WRITEB(x, c)
+
 /* Interrupt enable register */
 #define SERIAL_READ_IER(x)              (P_READB((x) + 1))
-#define SERIAL_WRITE_IER(x,c)           (P_WRITEB((x)+1,c))
+#define SERIAL_WRITE_IER(x,c)           (P_WRITEB((x) + 1, c))
+
 /* Interrupt identification register */
 #define SERIAL_READ_IIR(x)             (P_READB((x) + 2))
+
 /* Line status register */
 #define SERIAL_READ_LSR(x)             (P_READB((x) + 5))