Changeset e84439a in mainline for arch/mips/src/context.S

Timestamp:

2005-09-06T08:51:22Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e949fd6

Parents:

39ae77b

Message:

Fixed mips boot process.
On interrupt saving registers, save $lo, $hi.
Add interrupt naming to asm files (mips).
Save only necessary registers on context switch (see mips ABI).
Fixed copyright info.

File:

• arch/mips/src/context.S (modified) (3 diffs)

arch/mips/src/context.S

@@ -27 +27 @@
 #
 
-#include <arch/asm/macro.h>
-
+#define __ASM__
+#include <arch/asm/regname.h>
+#include "context_offset.h"
+        
 .text   
 
@@ -38 +40 @@
 .global context_restore
 
+.macro CONTEXT_STORE r
+        sw $s0,OFFSET_S0(\r)
+        sw $s1,OFFSET_S1(\r)
+        sw $s2,OFFSET_S2(\r)
+        sw $s3,OFFSET_S3(\r)
+        sw $s4,OFFSET_S4(\r)
+        sw $s5,OFFSET_S5(\r)
+        sw $s6,OFFSET_S6(\r)
+        sw $s7,OFFSET_S7(\r)
+        sw $s8,OFFSET_S7(\r)
+        sw $gp,OFFSET_GP(\r)
+        
+        sw $ra,OFFSET_PC(\r)
+        sw $sp,OFFSET_SP(\r)
+.endm
+
+.macro CONTEXT_LOAD r
+        lw $s0,OFFSET_S0(\r)
+        lw $s1,OFFSET_S1(\r)
+        lw $s2,OFFSET_S2(\r)
+        lw $s3,OFFSET_S3(\r)
+        lw $s4,OFFSET_S4(\r)
+        lw $s5,OFFSET_S5(\r)
+        lw $s6,OFFSET_S6(\r)
+        lw $s7,OFFSET_S7(\r)
+        lw $s8,OFFSET_S7(\r)
+        lw $gp,OFFSET_GP(\r)
+        
+        lw $ra,OFFSET_PC(\r)
+        lw $sp,OFFSET_SP(\r)
+.endm
+
+        
 context_save:
-        REGISTERS_STORE $4
+        CONTEXT_STORE $a0
 
         # context_save returns 1
@@ -46 +81 @@
         
 context_restore:
-        REGISTERS_LOAD $4
+        CONTEXT_LOAD $a0
 
         # context_restore returns 0