Changeset e2ec980f in mainline for arch/ia64/include/asm.h
- Timestamp:
- 2005-11-09T01:21:46Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b183865e
- Parents:
- 0b5ac364
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/asm.h
r0b5ac364 re2ec980f 49 49 } 50 50 51 /** Read IVA (Interruption Vector Address). 52 * 53 * @return Return location of interruption vector table. 54 */ 55 static inline __u64 iva_read(void) 56 { 57 __u64 v; 58 59 __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v)); 60 61 return v; 62 } 63 64 /** Write IVA (Interruption Vector Address) register. 65 * 66 * @param New location of interruption vector table. 67 */ 68 static inline void iva_write(__u64 v) 69 { 70 __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v)); 71 } 72 73 51 74 /** Read IVR (External Interrupt Vector Register). 52 75 * … … 219 242 } 220 243 221 #define set_shadow_register(reg,val) {__u64 v = val; __asm__ volatile("mov r15 = %0;;\n""bsw.0;;\n""mov " #reg " = r15;;\n""bsw.1;;\n" : : "r" (v) : "r15" ); }222 #define get_shadow_register(reg,val) {__u64 v ; __asm__ volatile("bsw.0;;\n" "mov r15 = r" #reg ";;\n" "bsw.1;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }223 224 #define get_control_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = cr" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }225 #define get_aplication_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = ar" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }226 #define get_psr(val) {__u64 v ; __asm__ volatile("mov r15 = psr;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }227 228 244 extern void cpu_halt(void); 229 245 extern void cpu_sleep(void);
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