Changeset e2ea4ab1 in mainline for kernel/arch
- Timestamp:
- 2010-07-02T14:22:35Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 09b859c
- Parents:
- 4d1be48 (diff), e3ee9b9 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch
- Files:
-
- 1 added
- 1 deleted
- 22 edited
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abs32le/include/interrupt.h (modified) (1 diff)
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abs32le/src/abs32le.c (modified) (1 diff)
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amd64/Makefile.inc (modified) (1 diff)
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amd64/src/asm.S (added)
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amd64/src/asm_utils.S (deleted)
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amd64/src/boot/boot.S (modified) (21 diffs)
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amd64/src/boot/vesa_ret.inc (modified) (2 diffs)
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amd64/src/debugger.c (modified) (1 diff)
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arm32/src/asm.S (modified) (3 diffs)
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ia32/include/smp/apic.h (modified) (2 diffs)
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ia32/src/asm.S (modified) (6 diffs)
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ia32/src/boot/boot.S (modified) (15 diffs)
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ia32/src/boot/vesa_prot.inc (modified) (7 diffs)
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ia32/src/boot/vesa_real.inc (modified) (19 diffs)
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ia32/src/boot/vesa_ret.inc (modified) (1 diff)
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ia32/src/smp/apic.c (modified) (4 diffs)
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ia32/src/smp/mps.c (modified) (5 diffs)
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ia32/src/smp/smp.c (modified) (4 diffs)
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ia64/src/asm.S (modified) (7 diffs)
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ia64/src/start.S (modified) (2 diffs)
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mips32/src/asm.S (modified) (8 diffs)
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ppc32/src/asm.S (modified) (7 diffs)
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sparc64/src/asm.S (modified) (7 diffs)
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sparc64/src/trap/sun4v/interrupt.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
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kernel/arch/abs32le/include/interrupt.h
r4d1be48 re2ea4ab1 37 37 38 38 #include <typedefs.h> 39 #include <verify.h> 39 40 40 41 #define IVT_ITEMS 0 -
kernel/arch/abs32le/src/abs32le.c
r4d1be48 re2ea4ab1 151 151 } 152 152 153 void early_putchar(wchar_t ch) 154 { 155 } 156 153 157 /** @} 154 158 */ -
kernel/arch/amd64/Makefile.inc
r4d1be48 re2ea4ab1 71 71 arch/$(KARCH)/src/mm/page.c \ 72 72 arch/$(KARCH)/src/mm/tlb.c \ 73 arch/$(KARCH)/src/asm _utils.S \73 arch/$(KARCH)/src/asm.S \ 74 74 arch/$(KARCH)/src/cpu/cpu.c \ 75 75 arch/$(KARCH)/src/proc/scheduler.c \ -
kernel/arch/amd64/src/boot/boot.S
r4d1be48 re2ea4ab1 1 # 2 #Copyright (c) 2005 Ondrej Palkovsky3 #Copyright (c) 2006 Martin Decky4 #Copyright (c) 2008 Jakub Jermar5 #All rights reserved.6 # 7 #Redistribution and use in source and binary forms, with or without8 #modification, are permitted provided that the following conditions9 #are met:10 # 11 #- Redistributions of source code must retain the above copyright12 #notice, this list of conditions and the following disclaimer.13 #- Redistributions in binary form must reproduce the above copyright14 #notice, this list of conditions and the following disclaimer in the15 #documentation and/or other materials provided with the distribution.16 #- The name of the author may not be used to endorse or promote products17 #derived from this software without specific prior written permission.18 # 19 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR20 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES21 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.22 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,23 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT24 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,25 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY26 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT27 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF28 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.29 # 1 /* 2 * Copyright (c) 2005 Ondrej Palkovsky 3 * Copyright (c) 2006 Martin Decky 4 * Copyright (c) 2008 Jakub Jermar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * - Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * - Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * - The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 30 31 31 #include <arch/boot/boot.h> … … 37 37 #include <arch/cpuid.h> 38 38 39 #define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)39 #define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE) 40 40 41 41 .section K_TEXT_START, "ax" 42 42 43 43 .code32 44 45 .macro pm_error msg 46 movl \msg, %esi 47 jmp pm_error_halt 48 .endm 49 50 .macro pm_status msg 51 #ifdef CONFIG_EGA 52 pushl %esi 53 movl \msg, %esi 54 call pm_early_puts 55 popl %esi 56 #endif 57 .endm 58 59 .macro pm2_status msg 60 #ifndef CONFIG_FB 61 pm_status \msg 62 #endif 63 .endm 64 44 65 .align 4 45 66 .global multiboot_image_start … … 47 68 .long MULTIBOOT_HEADER_MAGIC 48 69 .long MULTIBOOT_HEADER_FLAGS 49 .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum70 .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) /* checksum */ 50 71 .long multiboot_header 51 72 .long unmapped_ktext_start … … 56 77 multiboot_image_start: 57 78 cld 58 movl $START_STACK, %esp # initialize stack pointer 59 lgdtl bootstrap_gdtr # initialize Global Descriptor Table register 60 79 80 /* Initialize stack pointer */ 81 movl $START_STACK, %esp 82 83 /* Initialize Global Descriptor Table register */ 84 lgdtl bootstrap_gdtr 85 86 /* Kernel data + stack */ 61 87 movw $gdtselector(KDATA_DES), %cx 62 88 movw %cx, %es 63 movw %cx, %ds # kernel data + stack89 movw %cx, %ds 64 90 movw %cx, %ss 65 91 66 # 67 # Simics seems to remove hidden part of GS on entering user mode 68 # when _visible_ part of GS does not point to user-mode segment. 69 # 70 92 /* 93 * Simics seems to remove hidden part of GS on entering user mode 94 * when _visible_ part of GS does not point to user-mode segment. 95 */ 71 96 movw $gdtselector(UDATA_DES), %cx 72 97 movw %cx, %fs … … 76 101 multiboot_meeting_point: 77 102 78 movl %eax, grub_eax # save parameters from GRUB 103 /* Save GRUB arguments */ 104 movl %eax, grub_eax 79 105 movl %ebx, grub_ebx 80 106 81 # 82 # Protected 32-bit. We want to reuse the code-seg descriptor, 83 # the Default operand size must not be 1 when entering long mode. 84 # 107 pm_status $status_prot 85 108 86 109 movl $(INTEL_CPUID_EXTENDED), %eax … … 89 112 ja extended_cpuid_supported 90 113 91 movl $extended_cpuid_msg, %esi 92 jmp error_halt 114 pm_error $err_extended_cpuid 93 115 94 116 extended_cpuid_supported: … … 99 121 jc long_mode_supported 100 122 101 movl $long_mode_msg, %esi 102 jmp error_halt 123 pm_error $err_long_mode 103 124 104 125 long_mode_supported: … … 107 128 jc noexecute_supported 108 129 109 movl $noexecute_msg, %esi 110 jmp error_halt 130 pm_error $err_noexecute 111 131 112 132 noexecute_supported: … … 117 137 jc fx_supported 118 138 119 movl $fx_msg, %esi 120 jmp error_halt 139 pm_error $err_fx 121 140 122 141 fx_supported: … … 125 144 jc sse2_supported 126 145 127 movl $sse2_msg, %esi 128 jmp error_halt 146 pm_error $err_sse2 129 147 130 148 sse2_supported: 131 149 132 150 #include "vesa_prot.inc" 133 134 # 135 # Enable 64-bit page translation entries - CR4.PAE = 1. 136 # Paging is not enabled until after long mode is enabled. 137 # 151 152 /* 153 * Protected 32-bit. We want to reuse the code-seg descriptor, 154 * the Default operand size must not be 1 when entering long mode. 155 */ 156 157 pm2_status $status_prot2 158 159 /* 160 * Enable 64-bit page translation entries - CR4.PAE = 1. 161 * Paging is not enabled until after long mode is enabled. 162 */ 138 163 139 164 movl %cr4, %eax … … 141 166 movl %eax, %cr4 142 167 143 # set up paging tables 144 168 /* Set up paging tables */ 145 169 leal ptl_0, %eax 146 170 movl %eax, %cr3 147 171 148 # enable long mode 149 150 movl $EFER_MSR_NUM, %ecx # EFER MSR number 151 rdmsr # read EFER 152 btsl $AMD_LME_FLAG, %eax # set LME = 1 153 wrmsr # write EFER 154 155 # enable paging to activate long mode (set CR0.PG = 1) 156 172 /* Enable long mode */ 173 movl $EFER_MSR_NUM, %ecx 174 rdmsr /* read EFER */ 175 btsl $AMD_LME_FLAG, %eax /* set LME = 1 */ 176 wrmsr 177 178 /* Enable paging to activate long mode (set CR0.PG = 1) */ 157 179 movl %cr0, %eax 158 180 btsl $31, %eax 159 181 movl %eax, %cr0 160 182 161 # at this point we are in compatibility mode 162 183 /* At this point we are in compatibility mode */ 163 184 jmpl $gdtselector(KTEXT_DES), $start64 164 185 186 /** Print string to EGA display (in light red) and halt. 187 * 188 * Should be executed from 32 bit protected mode with paging 189 * turned off. Stack is not required. This routine is used even 190 * if CONFIG_EGA is not enabled. Since we are going to halt the 191 * CPU anyway, it is always better to at least try to print 192 * some hints. 193 * 194 * @param %esi Pointer to the NULL-terminated string 195 * to be print. 196 * 197 */ 198 pm_error_halt: 199 movl $0xb8000, %edi /* base of EGA text mode memory */ 200 xorl %eax, %eax 201 202 /* Read bits 8 - 15 of the cursor address */ 203 movw $0x3d4, %dx 204 movb $0xe, %al 205 outb %al, %dx 206 207 movw $0x3d5, %dx 208 inb %dx, %al 209 shl $8, %ax 210 211 /* Read bits 0 - 7 of the cursor address */ 212 movw $0x3d4, %dx 213 movb $0xf, %al 214 outb %al, %dx 215 216 movw $0x3d5, %dx 217 inb %dx, %al 218 219 /* Sanity check for the cursor on screen */ 220 cmp $2000, %ax 221 jb err_cursor_ok 222 223 movw $1998, %ax 224 225 err_cursor_ok: 226 227 movw %ax, %bx 228 shl $1, %eax 229 addl %eax, %edi 230 231 err_ploop: 232 lodsb 233 234 cmp $0, %al 235 je err_ploop_end 236 237 movb $0x0c, %ah /* black background, light red foreground */ 238 stosw 239 240 /* Sanity check for the cursor on the last line */ 241 inc %bx 242 cmp $2000, %bx 243 jb err_ploop 244 245 /* Scroll the screen (24 rows) */ 246 movl %esi, %edx 247 movl $0xb80a0, %esi 248 movl $0xb8000, %edi 249 movl $1920, %ecx 250 rep movsw 251 252 /* Clear the 24th row */ 253 xorl %eax, %eax 254 movl $80, %ecx 255 rep stosw 256 257 /* Go to row 24 */ 258 movl %edx, %esi 259 movl $0xb8f00, %edi 260 movw $1920, %bx 261 262 jmp err_ploop 263 err_ploop_end: 264 265 /* Write bits 8 - 15 of the cursor address */ 266 movw $0x3d4, %dx 267 movb $0xe, %al 268 outb %al, %dx 269 270 movw $0x3d5, %dx 271 movb %bh, %al 272 outb %al, %dx 273 274 /* Write bits 0 - 7 of the cursor address */ 275 movw $0x3d4, %dx 276 movb $0xf, %al 277 outb %al, %dx 278 279 movw $0x3d5, %dx 280 movb %bl, %al 281 outb %al, %dx 282 283 cli 284 hlt1: 285 hlt 286 jmp hlt1 287 288 /** Print string to EGA display (in light green). 289 * 290 * Should be called from 32 bit protected mode with paging 291 * turned off. A stack space of at least 24 bytes is required, 292 * but the function does not establish a stack frame. 293 * 294 * Macros such as pm_status and pm2_status take care that 295 * this function is used only when CONFIG_EGA is enabled 296 * and CONFIG_FB is disabled. 297 * 298 * @param %esi Pointer to the NULL-terminated string 299 * to be print. 300 * 301 */ 302 pm_early_puts: 303 pushl %eax 304 pushl %ebx 305 pushl %ecx 306 pushl %edx 307 pushl %edi 308 309 movl $0xb8000, %edi /* base of EGA text mode memory */ 310 xorl %eax, %eax 311 312 /* Read bits 8 - 15 of the cursor address */ 313 movw $0x3d4, %dx 314 movb $0xe, %al 315 outb %al, %dx 316 317 movw $0x3d5, %dx 318 inb %dx, %al 319 shl $8, %ax 320 321 /* Read bits 0 - 7 of the cursor address */ 322 movw $0x3d4, %dx 323 movb $0xf, %al 324 outb %al, %dx 325 326 movw $0x3d5, %dx 327 inb %dx, %al 328 329 /* Sanity check for the cursor on screen */ 330 cmp $2000, %ax 331 jb pm_puts_cursor_ok 332 333 movw $1998, %ax 334 335 pm_puts_cursor_ok: 336 337 movw %ax, %bx 338 shl $1, %eax 339 addl %eax, %edi 340 341 pm_puts_ploop: 342 lodsb 343 344 cmp $0, %al 345 je pm_puts_ploop_end 346 347 movb $0x0a, %ah /* black background, light green foreground */ 348 stosw 349 350 /* Sanity check for the cursor on the last line */ 351 inc %bx 352 cmp $2000, %bx 353 jb pm_puts_ploop 354 355 /* Scroll the screen (24 rows) */ 356 movl %esi, %edx 357 movl $0xb80a0, %esi 358 movl $0xb8000, %edi 359 movl $1920, %ecx 360 rep movsw 361 362 /* Clear the 24th row */ 363 xorl %eax, %eax 364 movl $80, %ecx 365 rep stosw 366 367 /* Go to row 24 */ 368 movl %edx, %esi 369 movl $0xb8f00, %edi 370 movw $1920, %bx 371 372 jmp pm_puts_ploop 373 pm_puts_ploop_end: 374 375 /* Write bits 8 - 15 of the cursor address */ 376 movw $0x3d4, %dx 377 movb $0xe, %al 378 outb %al, %dx 379 380 movw $0x3d5, %dx 381 movb %bh, %al 382 outb %al, %dx 383 384 /* Write bits 0 - 7 of the cursor address */ 385 movw $0x3d4, %dx 386 movb $0xf, %al 387 outb %al, %dx 388 389 movw $0x3d5, %dx 390 movb %bl, %al 391 outb %al, %dx 392 393 popl %edi 394 popl %edx 395 popl %ecx 396 popl %ebx 397 popl %eax 398 399 ret 400 165 401 .code64 402 403 .macro long_status msg 404 pushq %rdi 405 movq \msg, %rdi 406 call early_puts 407 popq %rdi 408 .endm 409 166 410 start64: 411 412 /* 413 * Long mode. 414 */ 415 167 416 movq $(PA2KA(START_STACK)), %rsp 168 417 169 # call arch_pre_main(grub_eax, grub_ebx) 418 /* Create the first stack frame */ 419 pushq $0 420 movq %rsp, %rbp 421 422 long_status $status_long 423 424 /* Call arch_pre_main(grub_eax, grub_ebx) */ 170 425 xorq %rdi, %rdi 171 426 movl grub_eax, %edi … … 176 431 callq *%rax 177 432 178 # create the first stack frame 179 pushq $0 180 movq %rsp, %rbp 181 433 long_status $status_main 434 435 /* Call main_bsp() */ 182 436 movabsq $main_bsp, %rax 183 437 call *%rax 184 438 185 # not reached 186 439 /* Not reached */ 187 440 cli 188 441 hlt0: … … 190 443 jmp hlt0 191 444 192 # Print string from %esi to EGA display (in red) and halt 193 error_halt: 194 movl $0xb8000, %edi # base of EGA text mode memory 195 xorl %eax, %eax 196 197 movw $0x3d4, %dx # read bits 8 - 15 of the cursor address 445 /** Print string to EGA display. 446 * 447 * Should be called from long mode (with paging enabled 448 * and stack established). This function is ABI compliant 449 * (without red-zone). 450 * 451 * If CONFIG_EGA is undefined or CONFIG_FB is defined 452 * then this function does nothing. 453 * 454 * @param %rdi Pointer to the NULL-terminated string 455 * to be printed. 456 * 457 */ 458 early_puts: 459 460 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB))) 461 462 /* Prologue, save preserved registers */ 463 pushq %rbp 464 movq %rsp, %rbp 465 pushq %rbx 466 467 movq %rdi, %rsi 468 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */ 469 xorq %rax, %rax 470 471 /* Read bits 8 - 15 of the cursor address */ 472 movw $0x3d4, %dx 198 473 movb $0xe, %al 199 474 outb %al, %dx … … 203 478 shl $8, %ax 204 479 205 movw $0x3d4, %dx # read bits 0 - 7 of the cursor address 480 /* Read bits 0 - 7 of the cursor address */ 481 movw $0x3d4, %dx 206 482 movb $0xf, %al 207 483 outb %al, %dx … … 210 486 inb %dx, %al 211 487 212 cmp $1920, %ax 213 jbe cursor_ok 214 215 movw $1920, %ax # sanity check for the cursor on the last line 216 217 cursor_ok: 488 /* Sanity check for the cursor on screen */ 489 cmp $2000, %ax 490 jb early_puts_cursor_ok 491 492 movw $1998, %ax 493 494 early_puts_cursor_ok: 218 495 219 496 movw %ax, %bx 220 shl $1, %eax 221 addl %eax, %edi 222 223 movw $0x0c00, %ax # black background, light red foreground 224 225 ploop: 497 shl $1, %rax 498 addq %rax, %rdi 499 500 early_puts_ploop: 226 501 lodsb 502 227 503 cmp $0, %al 228 je ploop_end 504 je early_puts_ploop_end 505 506 movb $0x0e, %ah /* black background, yellow foreground */ 229 507 stosw 508 509 /* Sanity check for the cursor on the last line */ 230 510 inc %bx 231 jmp ploop 232 ploop_end: 233 234 movw $0x3d4, %dx # write bits 8 - 15 of the cursor address 511 cmp $2000, %bx 512 jb early_puts_ploop 513 514 /* Scroll the screen (24 rows) */ 515 movq %rsi, %rdx 516 movq $(PA2KA(0xb80a0)), %rsi 517 movq $(PA2KA(0xb8000)), %rdi 518 movq $1920, %rcx 519 rep movsw 520 521 /* Clear the 24th row */ 522 xorq %rax, %rax 523 movq $80, %rcx 524 rep stosw 525 526 /* Go to row 24 */ 527 movq %rdx, %rsi 528 movq $(PA2KA(0xb8f00)), %rdi 529 movw $1920, %bx 530 531 jmp early_puts_ploop 532 early_puts_ploop_end: 533 534 /* Write bits 8 - 15 of the cursor address */ 535 movw $0x3d4, %dx 235 536 movb $0xe, %al 236 537 outb %al, %dx … … 240 541 outb %al, %dx 241 542 242 movw $0x3d4, %dx # write bits 0 - 7 of the cursor address 543 /* Write bits 0 - 7 of the cursor address */ 544 movw $0x3d4, %dx 243 545 movb $0xf, %al 244 546 outb %al, %dx … … 248 550 outb %al, %dx 249 551 250 cli 251 hlt1: 252 hlt 253 jmp hlt1 552 /* Epilogue, restore preserved registers */ 553 popq %rbx 554 leave 555 556 #endif 557 558 ret 254 559 255 560 #include "vesa_real.inc" … … 257 562 .section K_INI_PTLS, "aw", @progbits 258 563 259 # 260 # Macro for generating initial page table contents. 261 # @param cnt Number of entries to generate. Must be multiple of 8. 262 # @param g Number of GB that will be added to the mapping. 263 # 564 /** Generate initial page table contents. 565 * 566 * @param cnt Number of entries to generate. Must be multiple of 8. 567 * @param g Number of GB that will be added to the mapping. 568 * 569 */ 264 570 .macro ptl2gen cnt g 265 571 .if \cnt … … 276 582 .endm 277 583 278 # Page table for pages in the 1st gigabyte. 584 /* Page table for pages in the 1st gigabyte. */ 279 585 .align 4096 280 586 ptl_2_0g: 281 587 ptl2gen 512 0 282 588 283 # Page table for pages in the 2nd gigabyte. 589 /* Page table for pages in the 2nd gigabyte. */ 284 590 .align 4096 285 591 ptl_2_1g: 286 592 ptl2gen 512 1 287 593 288 # Page table for pages in the 3rd gigabyte. 594 /* Page table for pages in the 3rd gigabyte. */ 289 595 .align 4096 290 596 ptl_2_2g: 291 597 ptl2gen 512 2 292 598 293 # Page table for pages in the 4th gigabyte. 599 /* Page table for pages in the 4th gigabyte. */ 294 600 .align 4096 295 601 ptl_2_3g: 296 602 ptl2gen 512 3 297 603 298 # Page table for pages in the 5th gigabyte. 604 /* Page table for pages in the 5th gigabyte. */ 299 605 .align 4096 300 606 ptl_2_4g: 301 607 ptl2gen 512 3 302 608 303 # Page table for pages in the 6th gigabyte. 609 /* Page table for pages in the 6th gigabyte. */ 304 610 .align 4096 305 611 ptl_2_5g: 306 612 ptl2gen 512 3 307 613 308 # Page table for pages in the 7th gigabyte. 614 /* Page table for pages in the 7th gigabyte. */ 309 615 .align 4096 310 616 ptl_2_6g: 311 617 ptl2gen 512 3 312 618 313 # Page table for pages in the 8th gigabyte. 619 /* Page table for pages in the 8th gigabyte. */ 314 620 .align 4096 315 621 ptl_2_7g: … … 318 624 .align 4096 319 625 ptl_1: 320 # Identity mapping for [0; 8G)626 /* Identity mapping for [0; 8G) */ 321 627 .quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT) 322 628 .quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT) … … 350 656 .long 0 351 657 352 e xtended_cpuid_msg:658 err_extended_cpuid: 353 659 .asciz "Error: Extended CPUID not supported -- CPU is not 64-bit. System halted." 354 long_mode_msg:660 err_long_mode: 355 661 .asciz "Error: 64-bit long mode not supported. System halted." 356 noexecute_msg:662 err_noexecute: 357 663 .asciz "Error: No-execute pages not supported. System halted." 358 fx_msg:664 err_fx: 359 665 .asciz "Error: FXSAVE/FXRESTORE instructions not supported. System halted." 360 sse2_msg:666 err_sse2: 361 667 .asciz "Error: SSE2 instructions not supported. System halted." 668 669 status_prot: 670 .asciz "[prot] " 671 status_vesa_copy: 672 .asciz "[vesa_copy] " 673 status_grub_cmdline: 674 .asciz "[grub_cmdline] " 675 status_vesa_real: 676 .asciz "[vesa_real] " 677 status_prot2: 678 .asciz "[prot2] " 679 status_long: 680 .asciz "[long] " 681 status_main: 682 .asciz "[main] " -
kernel/arch/amd64/src/boot/vesa_ret.inc
r4d1be48 re2ea4ab1 1 1 .code32 2 2 vesa_init_protected: 3 cld 4 5 /* Initialize stack pointer */ 6 movl $START_STACK, %esp 7 8 /* Kernel data + stack */ 3 9 movw $gdtselector(KDATA_DES), %cx 4 10 movw %cx, %es 5 movw %cx, %ds # kernel data + stack11 movw %cx, %ds 6 12 movw %cx, %ss 7 13 8 #9 #Simics seems to remove hidden part of GS on entering user mode10 #when _visible_ part of GS does not point to user-mode segment.11 #14 /* 15 * Simics seems to remove hidden part of GS on entering user mode 16 * when _visible_ part of GS does not point to user-mode segment. 17 */ 12 18 13 19 movw $gdtselector(UDATA_DES), %cx … … 15 21 movw %cx, %gs 16 22 17 movl $START_STACK, %esp # initialize stack pointer18 19 23 jmpl $gdtselector(KTEXT32_DES), $vesa_meeting_point -
kernel/arch/amd64/src/debugger.c
r4d1be48 re2ea4ab1 230 230 return; 231 231 232 printf("*** Found ZERO on address % lx(slot %d) ***\n",232 printf("*** Found ZERO on address %" PRIp " (slot %d) ***\n", 233 233 breakpoints[slot].address, slot); 234 234 } else { 235 printf("Data watchpoint - new data: % lx\n",235 printf("Data watchpoint - new data: %" PRIp "\n", 236 236 *((unative_t *) breakpoints[slot].address)); 237 237 } 238 238 } 239 239 240 printf("Reached breakpoint %d:% lx(%s)\n", slot, getip(istate),240 printf("Reached breakpoint %d:%" PRIp " (%s)\n", slot, getip(istate), 241 241 symtab_fmt_name_lookup(getip(istate))); 242 242 -
kernel/arch/arm32/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 #Copyright (c) 2007 Michal Kebrt3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2007 Michal Kebrt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 30 29 .text 31 30 … … 37 36 .global memcpy_from_uspace_failover_address 38 37 .global memcpy_to_uspace_failover_address 38 .global early_putchar 39 39 40 40 memsetb: … … 47 47 memcpy_from_uspace: 48 48 memcpy_to_uspace: 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 1: 56 cmp r2, #0 57 movne ip, #0 58 beq 3f 59 2: 60 ldrb r3, [ip, r1] 61 strb r3, [ip, r0] 62 add ip, ip, #1 63 cmp ip, r2 64 bne 2b 65 3: 66 mov r0, r5 67 ldmia sp!, {r4, r5, pc} 68 4: 69 add r3, r0, #3 70 bic r3, r3, #3 71 cmp r0, r3 72 bne 1b 73 movs r4, r2, lsr #2 74 moveq lr, r4 75 beq 6f 76 mov lr, #0 77 mov ip, lr 78 5: 79 ldr r3, [ip, r1] 80 add lr, lr, #1 81 cmp lr, r4 82 str r3, [ip, r0] 83 add ip, ip, #4 84 bne 5b 85 6: 86 ands r4, r2, #3 87 beq 3b 88 mov r3, lr, lsl #2 89 add r0, r3, r0 90 add ip, r3, r1 91 mov r2, #0 92 7: 93 ldrb r3, [r2, ip] 94 strb r3, [r2, r0] 95 add r2, r2, #1 96 cmp r2, r4 97 bne 7b 98 b 3b 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 56 1: 57 cmp r2, #0 58 movne ip, #0 59 beq 3f 60 61 2: 62 ldrb r3, [ip, r1] 63 strb r3, [ip, r0] 64 add ip, ip, #1 65 cmp ip, r2 66 bne 2b 67 68 3: 69 mov r0, r5 70 ldmia sp!, {r4, r5, pc} 71 72 4: 73 add r3, r0, #3 74 bic r3, r3, #3 75 cmp r0, r3 76 bne 1b 77 movs r4, r2, lsr #2 78 moveq lr, r4 79 beq 6f 80 mov lr, #0 81 mov ip, lr 82 83 5: 84 ldr r3, [ip, r1] 85 add lr, lr, #1 86 cmp lr, r4 87 str r3, [ip, r0] 88 add ip, ip, #4 89 bne 5b 90 91 6: 92 ands r4, r2, #3 93 beq 3b 94 mov r3, lr, lsl #2 95 add r0, r3, r0 96 add ip, r3, r1 97 mov r2, #0 98 99 7: 100 ldrb r3, [r2, ip] 101 strb r3, [r2, r0] 102 add r2, r2, #1 103 cmp r2, r4 104 bne 7b 105 b 3b 99 106 100 107 memcpy_from_uspace_failover_address: 101 108 memcpy_to_uspace_failover_address: 102 mov r0, #0 103 ldmia sp!, {r4, r5, pc} 109 mov r0, #0 110 ldmia sp!, {r4, r5, pc} 111 112 early_putchar: 113 mov pc, lr -
kernel/arch/ia32/include/smp/apic.h
r4d1be48 re2ea4ab1 347 347 348 348 extern uint32_t apic_id_mask; 349 extern uint8_t bsp_l_apic; 349 350 350 351 extern void apic_init(void); … … 355 356 extern int l_apic_send_init_ipi(uint8_t); 356 357 extern void l_apic_debug(void); 357 extern uint8_t l_apic_id(void);358 358 359 359 extern uint32_t io_apic_read(uint8_t); -
kernel/arch/ia32/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 # Copyright (c) 2001-2004 Jakub Jermar 3 # All rights reserved. 4 # 5 # Redistribution and use in source and binary forms, with or without 6 # modification, are permitted provided that the following conditions 7 # are met: 8 # 9 # - Redistributions of source code must retain the above copyright 10 # notice, this list of conditions and the following disclaimer. 11 # - Redistributions in binary form must reproduce the above copyright 12 # notice, this list of conditions and the following disclaimer in the 13 # documentation and/or other materials provided with the distribution. 14 # - The name of the author may not be used to endorse or promote products 15 # derived from this software without specific prior written permission. 16 # 17 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 # 28 29 ## very low and hardware-level functions 30 31 # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error 32 # word and 1 means interrupt with error word 33 #define ERROR_WORD_INTERRUPT_LIST 0x00027d00 1 /* 2 * Copyright (c) 2001 Jakub Jermar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /** Very low and hardware-level functions 30 * 31 */ 32 33 /** 34 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int 35 * has no error word and 1 means interrupt with error word 36 * 37 */ 38 #define ERROR_WORD_INTERRUPT_LIST 0x00027d00 39 40 #include <arch/pm.h> 41 #include <arch/mm/page.h> 34 42 35 43 .text 36 37 44 .global paging_on 38 45 .global enable_l_apic_in_msr … … 45 52 .global memcpy_to_uspace 46 53 .global memcpy_to_uspace_failover_address 47 48 49 # Wrapper for generic memsetb 54 .global early_putchar 55 56 /* Wrapper for generic memsetb */ 50 57 memsetb: 51 58 jmp _memsetb 52 59 53 # Wrapper for generic memsetw 60 /* Wrapper for generic memsetw */ 54 61 memsetw: 55 62 jmp _memsetw 56 63 57 58 #define MEMCPY_DST 4 59 #define MEMCPY_SRC 8 60 #define MEMCPY_SIZE 12 64 #define MEMCPY_DST 4 65 #define MEMCPY_SRC 8 66 #define MEMCPY_SIZE 12 61 67 62 68 /** Copy memory to/from userspace. … … 68 74 * or copy_to_uspace(). 69 75 * 70 * @param MEMCPY_DST(%esp) Destination address.71 * @param MEMCPY_SRC(%esp) Source address.72 * @param MEMCPY_SIZE(%esp) Size.76 * @param MEMCPY_DST(%esp) Destination address. 77 * @param MEMCPY_SRC(%esp) Source address. 78 * @param MEMCPY_SIZE(%esp) Size. 73 79 * 74 80 * @return MEMCPY_DST(%esp) on success and 0 on failure. 81 * 75 82 */ 76 83 memcpy: 77 84 memcpy_from_uspace: 78 85 memcpy_to_uspace: 79 movl %edi, %edx /* save %edi */80 movl %esi, %eax /* save %esi */86 movl %edi, %edx /* save %edi */ 87 movl %esi, %eax /* save %esi */ 81 88 82 89 movl MEMCPY_SIZE(%esp), %ecx 83 shrl $2, %ecx /* size / 4 */90 shrl $2, %ecx /* size / 4 */ 84 91 85 92 movl MEMCPY_DST(%esp), %edi 86 93 movl MEMCPY_SRC(%esp), %esi 87 94 88 rep movsl /* copy whole words */ 89 95 /* Copy whole words */ 96 rep movsl 97 90 98 movl MEMCPY_SIZE(%esp), %ecx 91 andl $3, %ecx /* size % 4 */99 andl $3, %ecx /* size % 4 */ 92 100 jz 0f 93 101 94 rep movsb /* copy the rest byte by byte */ 95 96 0: 97 movl %edx, %edi 98 movl %eax, %esi 99 movl MEMCPY_DST(%esp), %eax /* MEMCPY_DST(%esp), success */ 100 ret 101 102 /* Copy the rest byte by byte */ 103 rep movsb 104 105 0: 106 107 movl %edx, %edi 108 movl %eax, %esi 109 110 /* MEMCPY_DST(%esp), success */ 111 movl MEMCPY_DST(%esp), %eax 112 ret 113 102 114 /* 103 115 * We got here from as_page_fault() after the memory operations … … 108 120 movl %edx, %edi 109 121 movl %eax, %esi 110 xorl %eax, %eax /* return 0, failure */ 122 123 /* Return 0, failure */ 124 xorl %eax, %eax 111 125 ret 112 126 113 ## Turn paging on 114 # 115 # Enable paging and write-back caching in CR0. 116 # 127 /** Turn paging on 128 * 129 * Enable paging and write-back caching in CR0. 130 * 131 */ 117 132 paging_on: 118 133 movl %cr0, %edx 119 orl $(1 << 31), %edx # paging on 120 # clear Cache Disable and not Write Though 134 orl $(1 << 31), %edx /* paging on */ 135 136 /* Clear Cache Disable and not Write Though */ 121 137 andl $~((1 << 30) | (1 << 29)), %edx 122 movl %edx, %cr0138 movl %edx, %cr0 123 139 jmp 0f 124 0: 125 ret 126 127 128 ## Enable local APIC 129 # 130 # Enable local APIC in MSR. 131 # 140 141 0: 142 ret 143 144 /** Enable local APIC 145 * 146 * Enable local APIC in MSR. 147 * 148 */ 132 149 enable_l_apic_in_msr: 133 150 movl $0x1b, %ecx … … 138 155 ret 139 156 140 # Clear nested flag 141 # overwrites %ecx 157 /** Clear nested flag 158 * 159 */ 142 160 .macro CLEAR_NT_FLAG 143 161 pushfl 144 162 andl $0xffffbfff, (%esp) 145 163 popfl 146 .endm 164 .endm 147 165 148 166 /* … … 158 176 sysenter_handler: 159 177 sti 160 pushl %ebp # remember user stack161 pushl %edi # remember return user address162 163 xorl %ebp, %ebp # stop stack traces here164 165 pushl %gs # remember TLS166 167 pushl %eax # syscall number168 subl $8, %esp # unused sixth and fifth argument169 pushl %esi # fourth argument170 pushl %ebx # third argument171 pushl %ecx # second argument172 pushl %edx # first argument173 178 pushl %ebp /* remember user stack */ 179 pushl %edi /* remember return user address */ 180 181 xorl %ebp, %ebp /* stop stack traces here */ 182 183 pushl %gs /* remember TLS */ 184 185 pushl %eax /* syscall number */ 186 subl $8, %esp /* unused sixth and fifth argument */ 187 pushl %esi /* fourth argument */ 188 pushl %ebx /* third argument */ 189 pushl %ecx /* second argument */ 190 pushl %edx /* first argument */ 191 174 192 movw $16, %ax 175 193 movw %ax, %ds 176 194 movw %ax, %es 177 195 178 196 cld 179 197 call syscall_handler 180 addl $28, %esp # remove arguments from stack 181 182 pop %gs # restore TLS 183 184 pop %edx # prepare return EIP for SYSEXIT 185 pop %ecx # prepare userspace ESP for SYSEXIT 186 187 sysexit # return to userspace 188 189 190 #define ISTATE_OFFSET_EAX 0 191 #define ISTATE_OFFSET_EBX 4 192 #define ISTATE_OFFSET_ECX 8 193 #define ISTATE_OFFSET_EDX 12 194 #define ISTATE_OFFSET_EDI 16 195 #define ISTATE_OFFSET_ESI 20 196 #define ISTATE_OFFSET_EBP 24 197 #define ISTATE_OFFSET_EBP_FRAME 28 198 #define ISTATE_OFFSET_EIP_FRAME 32 199 #define ISTATE_OFFSET_GS 36 200 #define ISTATE_OFFSET_FS 40 201 #define ISTATE_OFFSET_ES 44 202 #define ISTATE_OFFSET_DS 48 203 #define ISTATE_OFFSET_ERROR_WORD 52 204 #define ISTATE_OFFSET_EIP 56 205 #define ISTATE_OFFSET_CS 60 206 #define ISTATE_OFFSET_EFLAGS 64 207 #define ISTATE_OFFSET_ESP 68 208 #define ISTATE_OFFSET_SS 72 198 addl $28, %esp /* remove arguments from stack */ 199 200 pop %gs /* restore TLS */ 201 202 pop %edx /* prepare return EIP for SYSEXIT */ 203 pop %ecx /* prepare userspace ESP for SYSEXIT */ 204 205 sysexit /* return to userspace */ 206 207 #define ISTATE_OFFSET_EAX 0 208 #define ISTATE_OFFSET_EBX 4 209 #define ISTATE_OFFSET_ECX 8 210 #define ISTATE_OFFSET_EDX 12 211 #define ISTATE_OFFSET_EDI 16 212 #define ISTATE_OFFSET_ESI 20 213 #define ISTATE_OFFSET_EBP 24 214 #define ISTATE_OFFSET_EBP_FRAME 28 215 #define ISTATE_OFFSET_EIP_FRAME 32 216 #define ISTATE_OFFSET_GS 36 217 #define ISTATE_OFFSET_FS 40 218 #define ISTATE_OFFSET_ES 44 219 #define ISTATE_OFFSET_DS 48 220 #define ISTATE_OFFSET_ERROR_WORD 52 221 #define ISTATE_OFFSET_EIP 56 222 #define ISTATE_OFFSET_CS 60 223 #define ISTATE_OFFSET_EFLAGS 64 224 #define ISTATE_OFFSET_ESP 68 225 #define ISTATE_OFFSET_SS 72 209 226 210 227 /* 211 * Size of the istate structure without the hardware-saved part and without the 212 * error word. 213 */ 214 #define ISTATE_SOFT_SIZE 52 215 216 ## Declare interrupt handlers 217 # 218 # Declare interrupt handlers for n interrupt 219 # vectors starting at vector i. 220 # 221 # The handlers setup data segment registers 222 # and call exc_dispatch(). 223 # 224 #define INTERRUPT_ALIGN 256 228 * Size of the istate structure without the hardware-saved part 229 * and without the error word. 230 */ 231 #define ISTATE_SOFT_SIZE 52 232 233 /** Declare interrupt handlers 234 * 235 * Declare interrupt handlers for n interrupt 236 * vectors starting at vector i. 237 * 238 * The handlers setup data segment registers 239 * and call exc_dispatch(). 240 * 241 */ 242 #define INTERRUPT_ALIGN 256 243 225 244 .macro handler i n 226 227 .ifeq \i - 0x30 # Syscall handler 228 pushl %ds 229 pushl %es 230 pushl %fs 231 pushl %gs 232 233 # 234 # Push syscall arguments onto the stack 235 # 236 # NOTE: The idea behind the order of arguments passed in registers is to 237 # use all scratch registers first and preserved registers next. 238 # An optimized libc syscall wrapper can make use of this setup. 239 # 240 pushl %eax 241 pushl %ebp 242 pushl %edi 243 pushl %esi 244 pushl %ebx 245 pushl %ecx 246 pushl %edx 247 248 # we must fill the data segment registers 249 movw $16, %ax 250 movw %ax, %ds 251 movw %ax, %es 252 253 xorl %ebp, %ebp 254 255 cld 256 sti 257 # syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax) 258 call syscall_handler 259 cli 260 261 movl 20(%esp), %ebp # restore EBP 262 addl $28, %esp # clean-up of parameters 263 264 popl %gs 265 popl %fs 266 popl %es 267 popl %ds 268 269 CLEAR_NT_FLAG 270 iret 271 .else 272 /* 273 * This macro distinguishes between two versions of ia32 exceptions. 274 * One version has error word and the other does not have it. 275 * The latter version fakes the error word on the stack so that the 276 * handlers and istate_t can be the same for both types. 277 */ 278 .iflt \i - 32 279 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST 280 # 281 # Exception with error word: do nothing 282 # 283 .else 284 # 285 # Exception without error word: fake up one 286 # 287 pushl $0 288 .endif 289 .else 290 # 291 # Interrupt: fake up one 292 # 293 pushl $0 294 .endif 295 296 subl $ISTATE_SOFT_SIZE, %esp 297 298 # 299 # Save the general purpose registers. 300 # 301 movl %eax, ISTATE_OFFSET_EAX(%esp) 302 movl %ebx, ISTATE_OFFSET_EBX(%esp) 303 movl %ecx, ISTATE_OFFSET_ECX(%esp) 304 movl %edx, ISTATE_OFFSET_EDX(%esp) 305 movl %edi, ISTATE_OFFSET_EDI(%esp) 306 movl %esi, ISTATE_OFFSET_ESI(%esp) 307 movl %ebp, ISTATE_OFFSET_EBP(%esp) 308 309 # 310 # Save the selector registers. 311 # 312 movl %gs, %eax 313 movl %fs, %ebx 314 movl %es, %ecx 315 movl %ds, %edx 316 317 movl %eax, ISTATE_OFFSET_GS(%esp) 318 movl %ebx, ISTATE_OFFSET_FS(%esp) 319 movl %ecx, ISTATE_OFFSET_ES(%esp) 320 movl %edx, ISTATE_OFFSET_DS(%esp) 321 322 # 323 # Switch to kernel selectors. 324 # 325 movl $16, %eax 326 movl %eax, %ds 327 movl %eax, %es 328 329 # 330 # Imitate a regular stack frame linkage. 331 # Stop stack traces here if we came from userspace. 332 # 333 cmpl $8, ISTATE_OFFSET_CS(%esp) 334 jz 0f 335 xorl %ebp, %ebp 336 0: movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp) 337 movl ISTATE_OFFSET_EIP(%esp), %eax 338 movl %eax, ISTATE_OFFSET_EIP_FRAME(%esp) 339 leal ISTATE_OFFSET_EBP_FRAME(%esp), %ebp 340 341 cld 342 343 pushl %esp # pass istate address 344 pushl $(\i) # pass intnum 345 call exc_dispatch # exc_dispatch(intnum, istate) 346 addl $8, %esp # Clear arguments from the stack 347 348 CLEAR_NT_FLAG 349 350 # 351 # Restore the selector registers. 352 # 353 movl ISTATE_OFFSET_GS(%esp), %eax 354 movl ISTATE_OFFSET_FS(%esp), %ebx 355 movl ISTATE_OFFSET_ES(%esp), %ecx 356 movl ISTATE_OFFSET_DS(%esp), %edx 357 358 movl %eax, %gs 359 movl %ebx, %fs 360 movl %ecx, %es 361 movl %edx, %ds 362 363 # 364 # Restore the scratch registers and the preserved registers the handler 365 # cloberred itself (i.e. EBX and EBP). 366 # 367 movl ISTATE_OFFSET_EAX(%esp), %eax 368 movl ISTATE_OFFSET_EBX(%esp), %ebx 369 movl ISTATE_OFFSET_ECX(%esp), %ecx 370 movl ISTATE_OFFSET_EDX(%esp), %edx 371 movl ISTATE_OFFSET_EBP(%esp), %ebp 372 373 addl $(ISTATE_SOFT_SIZE + 4), %esp 374 iret 375 .endif 376 377 .align INTERRUPT_ALIGN 378 .if (\n- \i) - 1 379 handler "(\i + 1)", \n 380 .endif 245 .ifeq \i - 0x30 246 /* Syscall handler */ 247 pushl %ds 248 pushl %es 249 pushl %fs 250 pushl %gs 251 252 /* 253 * Push syscall arguments onto the stack 254 * 255 * NOTE: The idea behind the order of arguments passed 256 * in registers is to use all scratch registers 257 * first and preserved registers next. An optimized 258 * libc syscall wrapper can make use of this setup. 259 * 260 */ 261 pushl %eax 262 pushl %ebp 263 pushl %edi 264 pushl %esi 265 pushl %ebx 266 pushl %ecx 267 pushl %edx 268 269 /* We must fill the data segment registers */ 270 movw $16, %ax 271 movw %ax, %ds 272 movw %ax, %es 273 274 xorl %ebp, %ebp 275 276 cld 277 sti 278 279 /* Call syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax) */ 280 call syscall_handler 281 cli 282 283 movl 20(%esp), %ebp /* restore EBP */ 284 addl $28, %esp /* clean-up of parameters */ 285 286 popl %gs 287 popl %fs 288 popl %es 289 popl %ds 290 291 CLEAR_NT_FLAG 292 iret 293 .else 294 /* 295 * This macro distinguishes between two versions of ia32 296 * exceptions. One version has error word and the other 297 * does not have it. The latter version fakes the error 298 * word on the stack so that the handlers and istate_t 299 * can be the same for both types. 300 */ 301 .iflt \i - 32 302 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST 303 /* 304 * Exception with error word: do nothing 305 */ 306 .else 307 /* 308 * Exception without error word: fake up one 309 */ 310 pushl $0 311 .endif 312 .else 313 /* 314 * Interrupt: fake up one 315 */ 316 pushl $0 317 .endif 318 319 subl $ISTATE_SOFT_SIZE, %esp 320 321 /* 322 * Save the general purpose registers. 323 */ 324 movl %eax, ISTATE_OFFSET_EAX(%esp) 325 movl %ebx, ISTATE_OFFSET_EBX(%esp) 326 movl %ecx, ISTATE_OFFSET_ECX(%esp) 327 movl %edx, ISTATE_OFFSET_EDX(%esp) 328 movl %edi, ISTATE_OFFSET_EDI(%esp) 329 movl %esi, ISTATE_OFFSET_ESI(%esp) 330 movl %ebp, ISTATE_OFFSET_EBP(%esp) 331 332 /* 333 * Save the selector registers. 334 */ 335 movl %gs, %eax 336 movl %fs, %ebx 337 movl %es, %ecx 338 movl %ds, %edx 339 340 movl %eax, ISTATE_OFFSET_GS(%esp) 341 movl %ebx, ISTATE_OFFSET_FS(%esp) 342 movl %ecx, ISTATE_OFFSET_ES(%esp) 343 movl %edx, ISTATE_OFFSET_DS(%esp) 344 345 /* 346 * Switch to kernel selectors. 347 */ 348 movl $16, %eax 349 movl %eax, %ds 350 movl %eax, %es 351 352 /* 353 * Imitate a regular stack frame linkage. 354 * Stop stack traces here if we came from userspace. 355 */ 356 cmpl $8, ISTATE_OFFSET_CS(%esp) 357 jz 0f 358 xorl %ebp, %ebp 359 360 0: 361 362 movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp) 363 movl ISTATE_OFFSET_EIP(%esp), %eax 364 movl %eax, ISTATE_OFFSET_EIP_FRAME(%esp) 365 leal ISTATE_OFFSET_EBP_FRAME(%esp), %ebp 366 367 cld 368 369 pushl %esp /* pass istate address */ 370 pushl $(\i) /* pass intnum */ 371 372 /* Call exc_dispatch(intnum, istate) */ 373 call exc_dispatch 374 375 addl $8, %esp /* clear arguments from the stack */ 376 377 CLEAR_NT_FLAG 378 379 /* 380 * Restore the selector registers. 381 */ 382 movl ISTATE_OFFSET_GS(%esp), %eax 383 movl ISTATE_OFFSET_FS(%esp), %ebx 384 movl ISTATE_OFFSET_ES(%esp), %ecx 385 movl ISTATE_OFFSET_DS(%esp), %edx 386 387 movl %eax, %gs 388 movl %ebx, %fs 389 movl %ecx, %es 390 movl %edx, %ds 391 392 /* 393 * Restore the scratch registers and the preserved 394 * registers the handler cloberred itself 395 * (i.e. EBX and EBP). 396 */ 397 movl ISTATE_OFFSET_EAX(%esp), %eax 398 movl ISTATE_OFFSET_EBX(%esp), %ebx 399 movl ISTATE_OFFSET_ECX(%esp), %ecx 400 movl ISTATE_OFFSET_EDX(%esp), %edx 401 movl ISTATE_OFFSET_EBP(%esp), %ebp 402 403 addl $(ISTATE_SOFT_SIZE + 4), %esp 404 iret 405 406 .endif 407 408 .align INTERRUPT_ALIGN 409 .if (\n - \i) - 1 410 handler "(\i + 1)", \n 411 .endif 381 412 .endm 382 413 383 # keep in sync with pm.h !!! 384 IDT_ITEMS = 64 414 /* Keep in sync with pm.h! */ 415 #define IDT_ITEMS 64 416 385 417 .align INTERRUPT_ALIGN 386 418 interrupt_handlers: 387 h_start: 388 handler 0 IDT_ITEMS 389 h_end: 419 h_start: 420 handler 0 IDT_ITEMS 421 h_end: 422 423 /** Print Unicode character to EGA display. 424 * 425 * If CONFIG_EGA is undefined or CONFIG_FB is defined 426 * then this function does nothing. 427 * 428 * Since the EGA can only display Extended ASCII (usually 429 * ISO Latin 1) characters, some of the Unicode characters 430 * can be displayed in a wrong way. Only the newline character 431 * is interpreted, all other characters (even unprintable) are 432 * printed verbatim. 433 * 434 * @param %ebp+0x08 Unicode character to be printed. 435 * 436 */ 437 early_putchar: 438 439 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB))) 440 441 /* Prologue, save preserved registers */ 442 pushl %ebp 443 movl %esp, %ebp 444 pushl %ebx 445 pushl %esi 446 pushl %edi 447 448 movl $(PA2KA(0xb8000)), %edi /* base of EGA text mode memory */ 449 xorl %eax, %eax 450 451 /* Read bits 8 - 15 of the cursor address */ 452 movw $0x3d4, %dx 453 movb $0xe, %al 454 outb %al, %dx 455 456 movw $0x3d5, %dx 457 inb %dx, %al 458 shl $8, %ax 459 460 /* Read bits 0 - 7 of the cursor address */ 461 movw $0x3d4, %dx 462 movb $0xf, %al 463 outb %al, %dx 464 465 movw $0x3d5, %dx 466 inb %dx, %al 467 468 /* Sanity check for the cursor on screen */ 469 cmp $2000, %ax 470 jb early_putchar_cursor_ok 471 472 movw $1998, %ax 473 474 early_putchar_cursor_ok: 475 476 movw %ax, %bx 477 shl $1, %eax 478 addl %eax, %edi 479 480 movl 0x08(%ebp), %eax 481 482 cmp $0x0a, %al 483 jne early_putchar_print 484 485 /* Interpret newline */ 486 487 movw %bx, %ax /* %bx -> %dx:%ax */ 488 xorw %dx, %dx 489 490 movw $80, %cx 491 idivw %cx, %ax /* %dx = %bx % 80 */ 492 493 /* %bx <- %bx + 80 - (%bx % 80) */ 494 addw %cx, %bx 495 subw %dx, %bx 496 497 jmp early_putchar_newline 498 499 early_putchar_print: 500 501 /* Print character */ 502 503 movb $0x0e, %ah /* black background, yellow foreground */ 504 stosw 505 inc %bx 506 507 early_putchar_newline: 508 509 /* Sanity check for the cursor on the last line */ 510 cmp $2000, %bx 511 jb early_putchar_no_scroll 512 513 /* Scroll the screen (24 rows) */ 514 movl $(PA2KA(0xb80a0)), %esi 515 movl $(PA2KA(0xb8000)), %edi 516 movl $1920, %ecx 517 rep movsw 518 519 /* Clear the 24th row */ 520 xorl %eax, %eax 521 movl $80, %ecx 522 rep stosw 523 524 /* Go to row 24 */ 525 movw $1920, %bx 526 527 early_putchar_no_scroll: 528 529 /* Write bits 8 - 15 of the cursor address */ 530 movw $0x3d4, %dx 531 movb $0xe, %al 532 outb %al, %dx 533 534 movw $0x3d5, %dx 535 movb %bh, %al 536 outb %al, %dx 537 538 /* Write bits 0 - 7 of the cursor address */ 539 movw $0x3d4, %dx 540 movb $0xf, %al 541 outb %al, %dx 542 543 movw $0x3d5, %dx 544 movb %bl, %al 545 outb %al, %dx 546 547 /* Epilogue, restore preserved registers */ 548 popl %edi 549 popl %esi 550 popl %ebx 551 leave 552 553 #endif 554 555 ret 390 556 391 557 .data -
kernel/arch/ia32/src/boot/boot.S
r4d1be48 re2ea4ab1 1 # 2 # Copyright (c) 2001-2004Jakub Jermar3 # Copyright (c) 2005-2006Martin Decky4 #All rights reserved.5 # 6 #Redistribution and use in source and binary forms, with or without7 #modification, are permitted provided that the following conditions8 #are met:9 # 10 #- Redistributions of source code must retain the above copyright11 #notice, this list of conditions and the following disclaimer.12 #- Redistributions in binary form must reproduce the above copyright13 #notice, this list of conditions and the following disclaimer in the14 #documentation and/or other materials provided with the distribution.15 #- The name of the author may not be used to endorse or promote products16 #derived from this software without specific prior written permission.17 # 18 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR19 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES20 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.21 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,22 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT23 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,24 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY25 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT26 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF27 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.28 # 1 /* 2 * Copyright (c) 2001 Jakub Jermar 3 * Copyright (c) 2005 Martin Decky 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * - Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * - Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * - The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 29 30 30 #include <arch/boot/boot.h> … … 34 34 #include <arch/cpuid.h> 35 35 36 #define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)36 #define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE) 37 37 38 38 .section K_TEXT_START, "ax" 39 39 40 40 .code32 41 42 .macro pm_error msg 43 movl \msg, %esi 44 jmp pm_error_halt 45 .endm 46 47 .macro pm_status msg 48 #ifdef CONFIG_EGA 49 pushl %esi 50 movl \msg, %esi 51 call pm_early_puts 52 popl %esi 53 #endif 54 .endm 55 56 .macro pm2_status msg 57 pushl \msg 58 call early_puts 59 .endm 60 41 61 .align 4 42 62 .global multiboot_image_start … … 44 64 .long MULTIBOOT_HEADER_MAGIC 45 65 .long MULTIBOOT_HEADER_FLAGS 46 .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) # checksum66 .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) /* checksum */ 47 67 .long multiboot_header 48 68 .long unmapped_ktext_start … … 53 73 multiboot_image_start: 54 74 cld 55 movl $START_STACK, %esp # initialize stack pointer 56 lgdt KA2PA(bootstrap_gdtr) # initialize Global Descriptor Table register 57 75 76 /* Initialize stack pointer */ 77 movl $START_STACK, %esp 78 79 /* Initialize Global Descriptor Table register */ 80 lgdtl KA2PA(bootstrap_gdtr) 81 82 /* Kernel data + stack */ 58 83 movw $gdtselector(KDATA_DES), %cx 59 84 movw %cx, %es 60 85 movw %cx, %fs 61 86 movw %cx, %gs 62 movw %cx, %ds # kernel data + stack87 movw %cx, %ds 63 88 movw %cx, %ss 64 89 … … 66 91 multiboot_meeting_point: 67 92 68 movl %eax, grub_eax # save parameters from GRUB 93 /* Save GRUB arguments */ 94 movl %eax, grub_eax 69 95 movl %ebx, grub_ebx 96 97 pm_status $status_prot 70 98 71 99 movl $(INTEL_CPUID_LEVEL), %eax 72 100 cpuid 73 cmp $0x0, %eax # any function > 0?101 cmp $0x0, %eax /* any function > 0? */ 74 102 jbe pse_unsupported 75 103 … … 80 108 81 109 pse_unsupported: 82 movl $pse_msg, %esi83 jmp error_halt110 111 pm_error $err_pse 84 112 85 113 pse_supported: 86 114 87 115 #include "vesa_prot.inc" 88 89 # map kernel and turn paging on116 117 /* Map kernel and turn paging on */ 90 118 call map_kernel 91 119 92 # call arch_pre_main(grub_eax, grub_ebx) 120 /* Create the first stack frame */ 121 pushl $0 122 movl %esp, %ebp 123 124 pm2_status $status_prot2 125 126 /* Call arch_pre_main(grub_eax, grub_ebx) */ 93 127 pushl grub_ebx 94 128 pushl grub_eax 95 129 call arch_pre_main 96 97 # Create the first stack frame 98 pushl $0 99 movl %esp, %ebp 100 130 131 pm2_status $status_main 132 133 /* Call main_bsp() */ 101 134 call main_bsp 102 135 103 # not reached136 /* Not reached */ 104 137 cli 105 138 hlt0: … … 107 140 jmp hlt0 108 141 142 /** Setup mapping for the kernel. 143 * 144 * Setup mapping for both the unmapped and mapped sections 145 * of the kernel. For simplicity, we map the entire 4G space. 146 * 147 */ 109 148 .global map_kernel 110 149 map_kernel: 111 #112 # Here we setup mapping for both the unmapped and mapped sections of the kernel.113 # For simplicity, we map the entire 4G space.114 #115 150 movl %cr4, %ecx 116 orl $(1 << 4), %ecx # turn PSE on117 andl $(~(1 << 5)), %ecx # turn PAE off151 orl $(1 << 4), %ecx /* PSE on */ 152 andl $(~(1 << 5)), %ecx /* PAE off */ 118 153 movl %ecx, %cr4 119 154 … … 126 161 movl $((1 << 7) | (1 << 1) | (1 << 0)), %eax 127 162 orl %ebx, %eax 128 movl %eax, (%esi, %ecx, 4) # mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M 129 movl %eax, (%edi, %ecx, 4) # mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M 163 /* Mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */ 164 movl %eax, (%esi, %ecx, 4) 165 /* Mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */ 166 movl %eax, (%edi, %ecx, 4) 130 167 addl $(4 * 1024 * 1024), %ebx 131 168 … … 137 174 138 175 movl %cr0, %ebx 139 orl $(1 << 31), %ebx # turn paging on176 orl $(1 << 31), %ebx /* paging on */ 140 177 movl %ebx, %cr0 141 178 ret 142 179 143 # Print string from %esi to EGA display (in red) and halt 144 error_halt: 145 movl $0xb8000, %edi # base of EGA text mode memory 180 /** Print string to EGA display (in light red) and halt. 181 * 182 * Should be executed from 32 bit protected mode with paging 183 * turned off. Stack is not required. This routine is used even 184 * if CONFIG_EGA is not enabled. Since we are going to halt the 185 * CPU anyway, it is always better to at least try to print 186 * some hints. 187 * 188 * @param %esi NULL-terminated string to print. 189 * 190 */ 191 pm_error_halt: 192 movl $0xb8000, %edi /* base of EGA text mode memory */ 146 193 xorl %eax, %eax 147 194 148 movw $0x3d4, %dx # read bits 8 - 15 of the cursor address 195 /* Read bits 8 - 15 of the cursor address */ 196 movw $0x3d4, %dx 149 197 movb $0xe, %al 150 198 outb %al, %dx … … 154 202 shl $8, %ax 155 203 156 movw $0x3d4, %dx # read bits 0 - 7 of the cursor address 204 /* Read bits 0 - 7 of the cursor address */ 205 movw $0x3d4, %dx 157 206 movb $0xf, %al 158 207 outb %al, %dx … … 161 210 inb %dx, %al 162 211 163 cmp $1920, %ax 164 jbe cursor_ok 165 166 movw $1920, %ax # sanity check for the cursor on the last line 167 168 cursor_ok: 212 /* Sanity check for the cursor on screen */ 213 cmp $2000, %ax 214 jb err_cursor_ok 215 216 movw $1998, %ax 217 218 err_cursor_ok: 169 219 170 220 movw %ax, %bx … … 172 222 addl %eax, %edi 173 223 174 movw $0x0c00, %ax # black background, light red foreground 175 176 ploop: 224 err_ploop: 177 225 lodsb 226 178 227 cmp $0, %al 179 je ploop_end 228 je err_ploop_end 229 230 movb $0x0c, %ah /* black background, light red foreground */ 180 231 stosw 232 233 /* Sanity check for the cursor on the last line */ 181 234 inc %bx 182 jmp ploop 183 ploop_end: 184 185 movw $0x3d4, %dx # write bits 8 - 15 of the cursor address 235 cmp $2000, %bx 236 jb err_ploop 237 238 /* Scroll the screen (24 rows) */ 239 movl %esi, %edx 240 movl $0xb80a0, %esi 241 movl $0xb8000, %edi 242 movl $1920, %ecx 243 rep movsw 244 245 /* Clear the 24th row */ 246 xorl %eax, %eax 247 movl $80, %ecx 248 rep stosw 249 250 /* Go to row 24 */ 251 movl %edx, %esi 252 movl $0xb8f00, %edi 253 movw $1920, %bx 254 255 jmp err_ploop 256 err_ploop_end: 257 258 /* Write bits 8 - 15 of the cursor address */ 259 movw $0x3d4, %dx 186 260 movb $0xe, %al 187 261 outb %al, %dx … … 191 265 outb %al, %dx 192 266 193 movw $0x3d4, %dx # write bits 0 - 7 of the cursor address 267 /* Write bits 0 - 7 of the cursor address */ 268 movw $0x3d4, %dx 194 269 movb $0xf, %al 195 270 outb %al, %dx … … 204 279 jmp hlt1 205 280 281 /** Print string to EGA display (in light green). 282 * 283 * Should be called from 32 bit protected mode with paging 284 * turned off. A stack space of at least 24 bytes is required, 285 * but the function does not establish a stack frame. 286 * 287 * Macros such as pm_status take care that this function 288 * is used only when CONFIG_EGA is enabled. 289 * 290 * @param %esi NULL-terminated string to print. 291 * 292 */ 293 pm_early_puts: 294 pushl %eax 295 pushl %ebx 296 pushl %ecx 297 pushl %edx 298 pushl %edi 299 300 movl $0xb8000, %edi /* base of EGA text mode memory */ 301 xorl %eax, %eax 302 303 /* Read bits 8 - 15 of the cursor address */ 304 movw $0x3d4, %dx 305 movb $0xe, %al 306 outb %al, %dx 307 308 movw $0x3d5, %dx 309 inb %dx, %al 310 shl $8, %ax 311 312 /* Read bits 0 - 7 of the cursor address */ 313 movw $0x3d4, %dx 314 movb $0xf, %al 315 outb %al, %dx 316 317 movw $0x3d5, %dx 318 inb %dx, %al 319 320 /* Sanity check for the cursor on screen */ 321 cmp $2000, %ax 322 jb pm_puts_cursor_ok 323 324 movw $1998, %ax 325 326 pm_puts_cursor_ok: 327 328 movw %ax, %bx 329 shl $1, %eax 330 addl %eax, %edi 331 332 pm_puts_ploop: 333 lodsb 334 335 cmp $0, %al 336 je pm_puts_ploop_end 337 338 movb $0x0a, %ah /* black background, light green foreground */ 339 stosw 340 341 /* Sanity check for the cursor on the last line */ 342 inc %bx 343 cmp $2000, %bx 344 jb pm_puts_ploop 345 346 /* Scroll the screen (24 rows) */ 347 movl %esi, %edx 348 movl $0xb80a0, %esi 349 movl $0xb8000, %edi 350 movl $1920, %ecx 351 rep movsw 352 353 /* Clear the 24th row */ 354 xorl %eax, %eax 355 movl $80, %ecx 356 rep stosw 357 358 /* Go to row 24 */ 359 movl %edx, %esi 360 movl $0xb8f00, %edi 361 movw $1920, %bx 362 363 jmp pm_puts_ploop 364 pm_puts_ploop_end: 365 366 /* Write bits 8 - 15 of the cursor address */ 367 movw $0x3d4, %dx 368 movb $0xe, %al 369 outb %al, %dx 370 371 movw $0x3d5, %dx 372 movb %bh, %al 373 outb %al, %dx 374 375 /* Write bits 0 - 7 of the cursor address */ 376 movw $0x3d4, %dx 377 movb $0xf, %al 378 outb %al, %dx 379 380 movw $0x3d5, %dx 381 movb %bl, %al 382 outb %al, %dx 383 384 popl %edi 385 popl %edx 386 popl %ecx 387 popl %ebx 388 popl %eax 389 390 ret 391 392 /** Print string to EGA display. 393 * 394 * Should be called from 32 bit protected mode (with paging 395 * enabled and stack established). This function is ABI compliant. 396 * 397 * If CONFIG_EGA is undefined or CONFIG_FB is defined 398 * then this function does nothing. 399 * 400 * @param %ebp+0x08 NULL-terminated string to print. 401 * 402 */ 403 early_puts: 404 405 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB))) 406 407 /* Prologue, save preserved registers */ 408 pushl %ebp 409 movl %esp, %ebp 410 pushl %ebx 411 pushl %esi 412 pushl %edi 413 414 movl 0x08(%ebp), %esi 415 movl $(PA2KA(0xb8000)), %edi /* base of EGA text mode memory */ 416 xorl %eax, %eax 417 418 /* Read bits 8 - 15 of the cursor address */ 419 movw $0x3d4, %dx 420 movb $0xe, %al 421 outb %al, %dx 422 423 movw $0x3d5, %dx 424 inb %dx, %al 425 shl $8, %ax 426 427 /* Read bits 0 - 7 of the cursor address */ 428 movw $0x3d4, %dx 429 movb $0xf, %al 430 outb %al, %dx 431 432 movw $0x3d5, %dx 433 inb %dx, %al 434 435 /* Sanity check for the cursor on screen */ 436 cmp $2000, %ax 437 jb early_puts_cursor_ok 438 439 movw $1998, %ax 440 441 early_puts_cursor_ok: 442 443 movw %ax, %bx 444 shl $1, %eax 445 addl %eax, %edi 446 447 early_puts_ploop: 448 lodsb 449 450 cmp $0, %al 451 je early_puts_ploop_end 452 453 movb $0x0e, %ah /* black background, yellow foreground */ 454 stosw 455 456 /* Sanity check for the cursor on the last line */ 457 inc %bx 458 cmp $2000, %bx 459 jb early_puts_ploop 460 461 /* Scroll the screen (24 rows) */ 462 movl %esi, %edx 463 movl $(PA2KA(0xb80a0)), %esi 464 movl $(PA2KA(0xb8000)), %edi 465 movl $1920, %ecx 466 rep movsw 467 468 /* Clear the 24th row */ 469 xorl %eax, %eax 470 movl $80, %ecx 471 rep stosw 472 473 /* Go to row 24 */ 474 movl %edx, %esi 475 movl $(PA2KA(0xb8f00)), %edi 476 movw $1920, %bx 477 478 jmp early_puts_ploop 479 early_puts_ploop_end: 480 481 /* Write bits 8 - 15 of the cursor address */ 482 movw $0x3d4, %dx 483 movb $0xe, %al 484 outb %al, %dx 485 486 movw $0x3d5, %dx 487 movb %bh, %al 488 outb %al, %dx 489 490 /* Write bits 0 - 7 of the cursor address */ 491 movw $0x3d4, %dx 492 movb $0xf, %al 493 outb %al, %dx 494 495 movw $0x3d5, %dx 496 movb %bl, %al 497 outb %al, %dx 498 499 /* Epilogue, restore preserved registers */ 500 popl %edi 501 popl %esi 502 popl %ebx 503 leave 504 505 #endif 506 507 ret 508 206 509 #include "vesa_real.inc" 207 510 … … 218 521 .long 0 219 522 220 pse_msg:523 err_pse: 221 524 .asciz "Page Size Extension not supported. System halted." 222 525 526 status_prot: 527 .asciz "[prot] " 528 status_vesa_copy: 529 .asciz "[vesa_copy] " 530 status_grub_cmdline: 531 .asciz "[grub_cmdline] " 532 status_vesa_real: 533 .asciz "[vesa_real] " 534 status_prot2: 535 .asciz "[prot2] " 536 status_main: 537 .asciz "[main] " -
kernel/arch/ia32/src/boot/vesa_prot.inc
r4d1be48 re2ea4ab1 5 5 #define MBINFO_OFFSET_CMDLINE 16 6 6 7 # copy real mode VESA initialization code 7 /* Copy real mode VESA initialization code */ 8 9 pm_status $status_vesa_copy 8 10 9 11 mov $vesa_init, %esi … … 12 14 rep movsb 13 15 14 # check for GRUB command line 16 /* Check for GRUB command line */ 17 18 pm_status $status_grub_cmdline 15 19 16 20 mov grub_eax, %eax … … 23 27 jnc no_cmdline 24 28 25 # skip the kernel path in command line29 /* Skip the kernel path in command line */ 26 30 27 31 mov MBINFO_OFFSET_CMDLINE(%ebx), %esi … … 52 56 space_loop_done: 53 57 54 # copy at most 23 characters from command line58 /* Copy at most 23 characters from command line */ 55 59 56 60 mov $VESA_INIT_SEGMENT << 4, %edi … … 68 72 cmd_loop_done: 69 73 70 # zero termination74 /* Zero termination */ 71 75 72 76 xor %eax, %eax … … 75 79 no_cmdline: 76 80 77 # jump to the real mode 81 /* Jump to the real mode */ 82 83 pm_status $status_vesa_real 78 84 79 85 mov $VESA_INIT_SEGMENT << 4, %edi … … 81 87 82 88 vesa_meeting_point: 83 # returned back to protected mode89 /* Returned back to protected mode */ 84 90 85 91 mov %ax, KA2PA(vesa_scanline) -
kernel/arch/ia32/src/boot/vesa_real.inc
r4d1be48 re2ea4ab1 31 31 vesa_init: 32 32 jmp $gdtselector(VESA_INIT_DES), $vesa_init_real - vesa_init 33 33 34 34 .code16 35 35 vesa_init_real: … … 55 55 pushl %eax 56 56 57 # parse default mode string57 /* Parse default mode string */ 58 58 59 59 mov $default_mode - vesa_init, %di … … 65 65 mov (%di), %al 66 66 67 # check for digit67 /* Check for digit */ 68 68 69 69 cmp $'0', %al … … 75 75 sub $'0', %al 76 76 77 # multiply default_width by 10 and add digit77 /* Multiply default_width by 10 and add digit */ 78 78 79 79 mov default_width - vesa_init, %bx … … 96 96 mov (%di), %al 97 97 98 # check for digit98 /* Check for digit */ 99 99 100 100 cmp $'0', %al … … 106 106 sub $'0', %al 107 107 108 # multiply default_height by 10 and add digit108 /* Multiply default_height by 10 and add digit */ 109 109 110 110 mov default_height - vesa_init, %bx … … 127 127 mov (%di), %al 128 128 129 # check for digit129 /* Check for digit */ 130 130 131 131 cmp $'0', %al … … 137 137 sub $'0', %al 138 138 139 # multiply default_bpp by 10 and add digit139 /* Multiply default_bpp by 10 and add digit */ 140 140 141 141 mov default_bpp - vesa_init, %bx … … 167 167 168 168 next_mode: 169 # try next mode 169 /* Try next mode */ 170 170 171 mov %gs:(%si), %cx 171 172 cmp $VESA_END_OF_MODES, %cx … … 186 187 jne no_mode 187 188 188 # check for proper attributes (supported, color, graphics, linear framebuffer) 189 /* 190 * Check for proper attributes (supported, 191 * color, graphics, linear framebuffer). 192 */ 189 193 190 194 mov VESA_MODE_ATTRIBUTES_OFFSET(%di), %ax … … 193 197 jne next_mode 194 198 195 # check for proper resolution199 /* Check for proper resolution */ 196 200 197 201 mov default_width - vesa_init, %ax … … 203 207 jne next_mode 204 208 205 # check for proper bpp209 /* Check for proper bpp */ 206 210 207 211 mov default_bpp - vesa_init, %al … … 213 217 jne next_mode 214 218 215 # for 24 bpp modes accept also 32 bit bpp219 /* For 24 bpp modes accept also 32 bit bpp */ 216 220 217 221 mov $32, %al … … 230 234 jnz no_mode 231 235 232 # set 3:2:3 VGA palette236 /* Set 3:2:3 VGA palette */ 233 237 234 238 mov VESA_MODE_BPP_OFFSET(%di), %al … … 241 245 mov $0x100, %ecx 242 246 243 bt $5, %ax # test if VGA compatible registers are present 247 /* Test if VGA compatible registers are present */ 248 bt $5, %ax 244 249 jnc vga_compat 245 250 246 # try VESA routine to set palette 251 /* Use VESA routine to set the palette */ 252 247 253 mov $VESA_SET_PALETTE, %ax 248 254 xor %bl, %bl … … 254 260 255 261 vga_compat: 256 # try VGA registers to set palette 257 movw $0x3c6, %dx # set palette mask 262 263 /* Use VGA registers to set the palette */ 264 265 movw $0x3c6, %dx /* set palette mask */ 258 266 movb $0xff, %al 259 267 outb %al, %dx 260 268 261 movw $0x3c8, %dx # first index to set269 movw $0x3c8, %dx /* first index to set */ 262 270 xor %al, %al 263 271 outb %al, %dx 264 272 265 movw $0x3c9, %dx # data port273 movw $0x3c9, %dx /* data port */ 266 274 267 275 vga_loop: … … 284 292 vga_not_set: 285 293 286 # store mode parameters 287 # eax = bpp[8] scanline[16] 288 # ebx = width[16] height[16] 289 # edx = red_mask[8] red_pos[8] green_mask[8] green_pos[8] 290 # esi = blue_mask[8] blue_pos[8] 291 # edi = linear frame buffer 294 /* 295 * Store mode parameters: 296 * eax = bpp[8] scanline[16] 297 * ebx = width[16] height[16] 298 * edx = red_mask[8] red_pos[8] green_mask[8] green_pos[8] 299 * esi = blue_mask[8] blue_pos[8] 300 * edi = linear frame buffer 301 */ 292 302 293 303 mov VESA_MODE_BPP_OFFSET(%di), %al … … 328 338 329 339 no_mode: 330 # no prefered mode found 340 341 /* No prefered mode found */ 342 331 343 mov $0x111, %cx 332 344 push %di … … 339 351 cmp $VESA_OK, %al 340 352 jnz text_mode 341 jz set_mode # force relative jump353 jz set_mode /* force relative jump */ 342 354 343 355 text_mode: 344 # reset to EGA text mode (because of problems with VESA) 356 357 /* Reset to EGA text mode (because of problems with VESA) */ 358 345 359 mov $0x0003, %ax 346 360 int $0x10 347 361 mov $0xffffffff, %edi 348 362 xor %ax, %ax 349 jz vesa_leave_real # force relative jump363 jz vesa_leave_real /* force relative jump */ 350 364 351 365 vga323: -
kernel/arch/ia32/src/boot/vesa_ret.inc
r4d1be48 re2ea4ab1 1 1 .code32 2 2 vesa_init_protected: 3 cld 4 5 /* Initialize stack pointer */ 6 movl $START_STACK, %esp 7 8 /* Kernel data + stack */ 3 9 movw $gdtselector(KDATA_DES), %cx 4 10 movw %cx, %es 5 11 movw %cx, %fs 6 12 movw %cx, %gs 7 movw %cx, %ds # kernel data + stack13 movw %cx, %ds 8 14 movw %cx, %ss 9 15 10 movl $START_STACK, %esp # initialize stack pointer11 12 16 jmpl $gdtselector(KTEXT_DES), $vesa_meeting_point -
kernel/arch/ia32/src/smp/apic.c
r4d1be48 re2ea4ab1 76 76 77 77 uint32_t apic_id_mask = 0; 78 uint8_t bsp_l_apic = 0; 79 78 80 static irq_t l_apic_timer_irq; 79 81 … … 154 156 } 155 157 158 /** Get Local APIC ID. 159 * 160 * @return Local APIC ID. 161 * 162 */ 163 static uint8_t l_apic_id(void) 164 { 165 l_apic_id_t idreg; 166 167 idreg.value = l_apic[L_APIC_ID]; 168 return idreg.apic_id; 169 } 170 156 171 /** Initialize APIC on BSP. */ 157 172 void apic_init(void) … … 208 223 l_apic_init(); 209 224 l_apic_debug(); 225 226 bsp_l_apic = l_apic_id(); 210 227 } 211 228 … … 460 477 { 461 478 #ifdef LAPIC_VERBOSE 462 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", CPU->id, l_apic_id()); 479 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", 480 CPU->id, l_apic_id()); 463 481 464 482 lvt_tm_t tm; 465 483 tm.value = l_apic[LVT_Tm]; 466 printf("LVT Tm: vector=%hhd, %s, %s, %s\n", tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], tm_mode_str[tm.mode]); 484 printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n", 485 tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], 486 tm_mode_str[tm.mode]); 467 487 468 488 lvt_lint_t lint; 469 489 lint.value = l_apic[LVT_LINT0]; 470 printf("LVT LINT0: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]); 471 lint.value = l_apic[LVT_LINT1]; 472 printf("LVT LINT1: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]); 490 printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 491 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 492 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], 493 mask_str[lint.masked]); 494 495 lint.value = l_apic[LVT_LINT1]; 496 printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 497 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 498 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], 499 mask_str[lint.masked]); 473 500 474 501 lvt_error_t error; 475 502 error.value = l_apic[LVT_Err]; 476 printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]); 503 printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector, 504 delivs_str[error.delivs], mask_str[error.masked]); 477 505 #endif 478 }479 480 /** Get Local APIC ID.481 *482 * @return Local APIC ID.483 *484 */485 uint8_t l_apic_id(void)486 {487 l_apic_id_t idreg;488 489 idreg.value = l_apic[L_APIC_ID];490 return idreg.apic_id;491 506 } 492 507 -
kernel/arch/ia32/src/smp/mps.c
r4d1be48 re2ea4ab1 72 72 static size_t l_intr_entry_cnt = 0; 73 73 74 static uint8_t get_cpu_apic_id(size_t i)74 static uint8_t mps_cpu_apic_id(size_t i) 75 75 { 76 76 ASSERT(i < processor_entry_cnt); … … 79 79 } 80 80 81 static bool is_cpu_enabled(size_t i)81 static bool mps_cpu_enabled(size_t i) 82 82 { 83 83 ASSERT(i < processor_entry_cnt); … … 85 85 /* 86 86 * FIXME: The current local APIC driver limits usable 87 * APICIDs to 8.87 * CPU IDs to 8. 88 88 * 89 89 */ 90 if ( get_cpu_apic_id(i)> 7)90 if (i > 7) 91 91 return false; 92 92 … … 94 94 } 95 95 96 static bool is_bsp(size_t i)96 static bool mps_cpu_bootstrap(size_t i) 97 97 { 98 98 ASSERT(i < processor_entry_cnt); … … 118 118 */ 119 119 struct smp_config_operations mps_config_operations = { 120 .cpu_enabled = is_cpu_enabled,121 .cpu_bootstrap = is_bsp,122 .cpu_apic_id = get_cpu_apic_id,120 .cpu_enabled = mps_cpu_enabled, 121 .cpu_bootstrap = mps_cpu_bootstrap, 122 .cpu_apic_id = mps_cpu_apic_id, 123 123 .irq_to_pin = mps_irq_to_pin 124 124 }; -
kernel/arch/ia32/src/smp/smp.c
r4d1be48 re2ea4ab1 62 62 void smp_init(void) 63 63 { 64 uintptr_t l_apic_address;65 uintptr_t io_apic_address;66 67 64 if (acpi_madt) { 68 65 acpi_madt_parse(); … … 75 72 } 76 73 77 l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,78 FRAME_ATOMIC | FRAME_KA);79 if (!l_apic_address)80 panic("Cannot allocate address for l_apic.");81 82 io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,83 FRAME_ATOMIC | FRAME_KA);84 if (!io_apic_address)85 panic("Cannot allocate address for io_apic.");86 87 74 if (config.cpu_count > 1) { 88 page_table_lock(AS_KERNEL, true); 89 page_mapping_insert(AS_KERNEL, l_apic_address, 90 (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 91 page_mapping_insert(AS_KERNEL, io_apic_address, 92 (uintptr_t) io_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE); 93 page_table_unlock(AS_KERNEL, true); 94 95 l_apic = (uint32_t *) l_apic_address; 96 io_apic = (uint32_t *) io_apic_address; 75 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE); 76 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE); 97 77 } 98 78 } … … 133 113 apic_init(); 134 114 135 uint8_t apic = l_apic_id();136 137 115 for (i = 0; i < config.cpu_count; i++) { 138 116 /* … … 148 126 continue; 149 127 150 if (ops->cpu_apic_id(i) == apic) {151 printf(" %s: bad processor entry #%u, will not send IPI "152 "to myself\n", __FUNCTION__,i);128 if (ops->cpu_apic_id(i) == bsp_l_apic) { 129 printf("kmp: bad processor entry #%u, will not send IPI " 130 "to myself\n", i); 153 131 continue; 154 132 } -
kernel/arch/ia64/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 #Copyright (c) 2005 Jakub Jermar3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2005 Jakub Jermar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #include <arch/register.h> 30 30 31 31 .text 32 33 /** Copy memory from/to userspace.34 *35 * This memcpy() has been taken from the assembler output of36 * the generic _memcpy() and modified to have the failover part.37 *38 * @param in0 Destination address.39 * @param in1 Source address.40 * @param in2 Number of byte to copy.41 */42 32 .global memcpy 43 33 .global memcpy_from_uspace … … 45 35 .global memcpy_from_uspace_failover_address 46 36 .global memcpy_to_uspace_failover_address 37 38 /** Copy memory from/to userspace. 39 * 40 * This memcpy() has been taken from the assembler output of 41 * the generic _memcpy() and modified to have the failover part. 42 * 43 * @param in0 Destination address. 44 * @param in1 Source address. 45 * @param in2 Number of byte to copy. 46 * 47 */ 47 48 memcpy: 48 49 memcpy_from_uspace: 49 50 memcpy_to_uspace: 50 51 alloc loc0 = ar.pfs, 3, 1, 0, 0 51 52 52 53 adds r14 = 7, in1 53 54 mov r2 = ar.lc … … 55 56 and r14 = -8, r14 ;; 56 57 cmp.ne p6, p7 = r14, in1 57 (p7) br.cond.dpnt 3f ;; 58 0: 59 cmp.ne p6, p7 = 0, in2 60 (p7) br.cond.dpnt 2f ;; 61 (p6) adds r14 = -1, in2 62 (p6) mov r16 = r0 63 (p6) mov r17 = r0 ;; 64 (p6) mov ar.lc = r14 65 1: 66 add r14 = r16, in1 67 add r15 = r16, in0 68 adds r17 = 1, r17 ;; 69 ld1 r14 = [r14] 70 mov r16 = r17 ;; 71 st1 [r15] = r14 72 br.cloop.sptk.few 1b ;; 73 2: 74 mov ar.lc = r2 75 mov ar.pfs = loc0 76 br.ret.sptk.many rp 77 3: 78 adds r14 = 7, in0 ;; 79 and r14 = -8, r14 ;; 80 cmp.eq p6, p7 = r14, in0 81 (p7) br.cond.dptk 0b 82 shr.u r18 = in2, 3 ;; 83 cmp.ne p6, p7 = 0, r18 84 (p7) br.cond.dpnt 5f ;; 85 (p6) adds r14 = -1, r18 86 (p6) mov r16 = r0 87 (p6) mov r17 = r0 ;; 88 (p6) mov ar.lc = r14 89 4: 90 shladd r14 = r16, 3, r0 91 adds r16 = 1, r17 ;; 92 add r15 = in1, r14 93 add r14 = in0, r14 94 mov r17 = r16 ;; 95 ld8 r15 = [r15] ;; 96 st8 [r14] = r15 97 br.cloop.sptk.few 4b 98 5: 99 and r15 = 7, in2 100 shladd r14 = r18, 3, r0 101 mov r16 = r0 102 mov r18 = r0 ;; 103 cmp.eq p6, p7 = 0, r15 104 add in0 = r14, in0 105 adds r15 = -1, r15 106 add r17 = r14, in1 107 (p6) br.cond.dpnt 2b ;; 108 mov ar.lc = r15 109 6: 110 add r14 = r16, r17 111 add r15 = r16, in0 112 adds r16 = 1, r18 ;; 113 ld1 r14 = [r14] 114 mov r18 = r16 ;; 115 st1 [r15] = r14 116 br.cloop.sptk.few 6b ;; 117 mov ar.lc = r2 118 mov ar.pfs = loc0 119 br.ret.sptk.many rp 120 58 (p7) br.cond.dpnt 3f ;; 59 60 0: 61 62 cmp.ne p6, p7 = 0, in2 63 (p7) br.cond.dpnt 2f ;; 64 (p6) adds r14 = -1, in2 65 (p6) mov r16 = r0 66 (p6) mov r17 = r0 ;; 67 (p6) mov ar.lc = r14 68 69 1: 70 71 add r14 = r16, in1 72 add r15 = r16, in0 73 adds r17 = 1, r17 ;; 74 ld1 r14 = [r14] 75 mov r16 = r17 ;; 76 st1 [r15] = r14 77 br.cloop.sptk.few 1b ;; 78 79 2: 80 81 mov ar.lc = r2 82 mov ar.pfs = loc0 83 br.ret.sptk.many rp 84 85 3: 86 87 adds r14 = 7, in0 ;; 88 and r14 = -8, r14 ;; 89 cmp.eq p6, p7 = r14, in0 90 (p7) br.cond.dptk 0b 91 shr.u r18 = in2, 3 ;; 92 cmp.ne p6, p7 = 0, r18 93 (p7) br.cond.dpnt 5f ;; 94 (p6) adds r14 = -1, r18 95 (p6) mov r16 = r0 96 (p6) mov r17 = r0 ;; 97 (p6) mov ar.lc = r14 98 99 4: 100 101 shladd r14 = r16, 3, r0 102 adds r16 = 1, r17 ;; 103 add r15 = in1, r14 104 add r14 = in0, r14 105 mov r17 = r16 ;; 106 ld8 r15 = [r15] ;; 107 st8 [r14] = r15 108 br.cloop.sptk.few 4b 109 110 5: 111 112 and r15 = 7, in2 113 shladd r14 = r18, 3, r0 114 mov r16 = r0 115 mov r18 = r0 ;; 116 cmp.eq p6, p7 = 0, r15 117 add in0 = r14, in0 118 adds r15 = -1, r15 119 add r17 = r14, in1 120 (p6) br.cond.dpnt 2b ;; 121 mov ar.lc = r15 122 123 6: 124 125 add r14 = r16, r17 126 add r15 = r16, in0 127 adds r16 = 1, r18 ;; 128 ld1 r14 = [r14] 129 mov r18 = r16 ;; 130 st1 [r15] = r14 131 br.cloop.sptk.few 6b ;; 132 mov ar.lc = r2 133 mov ar.pfs = loc0 134 br.ret.sptk.many rp 135 121 136 memcpy_from_uspace_failover_address: 122 137 memcpy_to_uspace_failover_address: 123 mov r8 = r0 /* return 0 on failure */ 138 /* Return 0 on failure */ 139 mov r8 = r0 124 140 mov ar.pfs = loc0 125 141 br.ret.sptk.many rp … … 145 161 * @param in4 Value to be stored in IPSR. 146 162 * @param in5 Value to be stored in RSC. 163 * 147 164 */ 148 165 .global switch_to_userspace 149 166 switch_to_userspace: 150 167 alloc loc0 = ar.pfs, 6, 3, 0, 0 151 rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */ 168 169 /* Disable interruption collection and interrupts */ 170 rsm (PSR_IC_MASK | PSR_I_MASK) 152 171 srlz.d ;; 153 172 srlz.i ;; … … 156 175 mov cr.iip = in0 157 176 mov r12 = in1 158 177 159 178 xor r1 = r1, r1 160 179 … … 165 184 movl loc2 = PFM_MASK ;; 166 185 and loc1 = loc2, loc1 ;; 167 mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */168 186 mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */ 187 169 188 invala 170 189 171 190 mov loc1 = ar.rsc ;; 172 and loc1 = ~3, loc1 ;; 173 mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */174 191 and loc1 = ~3, loc1 ;; 192 mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */ 193 175 194 flushrs ;; 176 195 … … 181 200 182 201 rfi ;; 202 203 .global early_putchar 204 early_putchar: 205 br.ret.sptk.many b0 -
kernel/arch/ia64/src/start.S
r4d1be48 re2ea4ab1 47 47 48 48 stack0: 49 50 # 51 # Kernel entry point. 52 # 53 # This is where we are passed control from the boot code. 54 # Register contents: 55 # 56 # r2 Address of the boot code's bootinfo structure. 57 # 49 58 kernel_image_start: 50 59 .auto … … 157 166 loadrs 158 167 159 # Initialize memory stack to some sane value 160 movl r12 = stack0 ;; 161 add r12 = -16, r12 /* allocate a scratch area on the stack */ 168 # 169 # Initialize memory stack to some sane value and allocate a scratch are 170 # on it. 171 # 172 movl sp = stack0 ;; 173 add sp = -16, sp 162 174 163 175 # Initialize gp (Global Pointer) register 176 movl gp = kernel_image_start 177 178 # 179 # Initialize bootinfo on BSP. 180 # 164 181 movl r20 = (VRN_KERNEL << VRN_SHIFT) ;; 165 or r20 = r20, r1 ;; 166 movl r1 = kernel_image_start 167 168 /* 169 * Initialize bootinfo on BSP. 170 */ 182 or r20 = r20, r2 ;; 171 183 addl r21 = @gprel(bootinfo), gp ;; 172 184 st8 [r21] = r20 -
kernel/arch/mips32/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 # Copyright (c) 2003-2004Jakub Jermar3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2003 Jakub Jermar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #include <arch/asm/regname.h> … … 57 57 nop 58 58 59 60 59 .global memsetb 61 60 memsetb: … … 63 62 nop 64 63 65 66 64 .global memsetw 67 65 memsetw: 68 66 j _memsetw 69 67 nop 70 71 68 72 69 .global memcpy … … 78 75 memcpy_from_uspace: 79 76 memcpy_to_uspace: 80 move $t2, $a0 # save dst77 move $t2, $a0 /* save dst */ 81 78 82 79 addiu $v0, $a1, 3 83 li $v1, -4 # 0xfffffffffffffffc80 li $v1, -4 /* 0xfffffffffffffffc */ 84 81 and $v0, $v0, $v1 85 82 beq $a1, $v0, 3f … … 149 146 move $v0, $zero 150 147 151 152 153 148 .macro fpu_gp_save reg ctx 154 149 mfc1 $t0, $\reg … … 164 159 cfc1 $t0, $1 165 160 sw $t0, (\reg + 32) * 4(\ctx) 166 .endm 161 .endm 167 162 168 163 .macro fpu_ct_restore reg ctx … … 170 165 ctc1 $t0, $\reg 171 166 .endm 172 173 167 174 168 .global fpu_context_save … … 313 307 j $ra 314 308 nop 309 310 .global early_putchar 311 early_putchar: 312 j $ra 313 nop -
kernel/arch/ppc32/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 #Copyright (c) 2005 Martin Decky3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2005 Martin Decky 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #include <arch/asm/regname.h> … … 42 42 .global memcpy_from_uspace_failover_address 43 43 .global memcpy_to_uspace_failover_address 44 .global early_putchar 44 45 45 46 userspace_asm: 46 47 47 # r3 = uspace_uarg 48 # r4 = stack 49 # r5 = entry 50 51 # disable interrupts 48 /* 49 * r3 = uspace_uarg 50 * r4 = stack 51 * r5 = entry 52 */ 53 54 /* Disable interrupts */ 52 55 53 56 mfmsr r31 … … 55 58 mtmsr r31 56 59 57 # set entry point60 /* Set entry point */ 58 61 59 62 mtsrr0 r5 60 63 61 # set problem state, enable interrupts64 /* Set problem state, enable interrupts */ 62 65 63 66 ori r31, r31, MSR_PR … … 65 68 mtsrr1 r31 66 69 67 # set stack70 /* Set stack */ 68 71 69 72 mr sp, r4 70 73 71 # %r6 is defined to hold pcb_ptr - set it to 074 /* %r6 is defined to hold pcb_ptr - set it to 0 */ 72 75 73 76 xor r6, r6, r6 74 77 75 # jump to userspace78 /* Jump to userspace */ 76 79 77 80 rfi … … 79 82 iret: 80 83 81 # disable interrupts84 /* Disable interrupts */ 82 85 83 86 mfmsr r31 … … 141 144 iret_syscall: 142 145 143 # reset decrementer146 /* Reset decrementer */ 144 147 145 148 li r31, 1000 146 149 mtdec r31 147 150 148 # disable interrupts151 /* Disable interrupts */ 149 152 150 153 mfmsr r31 … … 278 281 memcpy_from_uspace_failover_address: 279 282 memcpy_to_uspace_failover_address: 280 # return zero, failure283 /* Return zero, failure */ 281 284 xor r3, r3, r3 282 285 blr 286 287 early_putchar: 288 blr -
kernel/arch/sparc64/src/asm.S
r4d1be48 re2ea4ab1 1 # 2 #Copyright (c) 2005 Jakub Jermar3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2005 Jakub Jermar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #include <arch/arch.h> … … 32 32 .text 33 33 34 .register %g2, #scratch35 .register %g3, #scratch34 .register %g2, #scratch 35 .register %g3, #scratch 36 36 37 37 /* … … 40 40 .global memcpy 41 41 memcpy: 42 mov %o0, %o3 ! save dst 43 add %o1, 7, %g1 44 and %g1, -8, %g1 45 cmp %o1, %g1 46 be,pn %xcc, 3f 47 add %o0, 7, %g1 48 mov 0, %g3 49 0: 50 brz,pn %o2, 2f 51 mov 0, %g2 52 1: 53 ldub [%g3 + %o1], %g1 54 add %g2, 1, %g2 55 cmp %o2, %g2 56 stb %g1, [%g3 + %o0] 57 bne,pt %xcc, 1b 58 mov %g2, %g3 59 2: 60 jmp %o7 + 8 ! exit point 61 mov %o3, %o0 62 3: 63 and %g1, -8, %g1 64 cmp %o0, %g1 65 bne,pt %xcc, 0b 66 mov 0, %g3 67 srlx %o2, 3, %g4 68 brz,pn %g4, 5f 69 mov 0, %g5 70 4: 71 sllx %g3, 3, %g2 72 add %g5, 1, %g3 73 ldx [%o1 + %g2], %g1 74 mov %g3, %g5 75 cmp %g4, %g3 76 bne,pt %xcc, 4b 77 stx %g1, [%o0 + %g2] 78 5: 79 and %o2, 7, %o2 80 brz,pn %o2, 2b 81 sllx %g4, 3, %g1 82 mov 0, %g2 83 add %g1, %o0, %o0 84 add %g1, %o1, %g4 85 mov 0, %g3 86 6: 87 ldub [%g2 + %g4], %g1 88 stb %g1, [%g2 + %o0] 89 add %g3, 1, %g2 90 cmp %o2, %g2 91 bne,pt %xcc, 6b 92 mov %g2, %g3 93 94 jmp %o7 + 8 ! exit point 95 mov %o3, %o0 42 mov %o0, %o3 /* save dst */ 43 add %o1, 7, %g1 44 and %g1, -8, %g1 45 cmp %o1, %g1 46 be,pn %xcc, 3f 47 add %o0, 7, %g1 48 mov 0, %g3 49 50 0: 51 52 brz,pn %o2, 2f 53 mov 0, %g2 54 55 1: 56 57 ldub [%g3 + %o1], %g1 58 add %g2, 1, %g2 59 cmp %o2, %g2 60 stb %g1, [%g3 + %o0] 61 bne,pt %xcc, 1b 62 mov %g2, %g3 63 64 2: 65 66 jmp %o7 + 8 /* exit point */ 67 mov %o3, %o0 68 69 3: 70 71 and %g1, -8, %g1 72 cmp %o0, %g1 73 bne,pt %xcc, 0b 74 mov 0, %g3 75 srlx %o2, 3, %g4 76 brz,pn %g4, 5f 77 mov 0, %g5 78 79 4: 80 81 sllx %g3, 3, %g2 82 add %g5, 1, %g3 83 ldx [%o1 + %g2], %g1 84 mov %g3, %g5 85 cmp %g4, %g3 86 bne,pt %xcc, 4b 87 stx %g1, [%o0 + %g2] 88 89 5: 90 91 and %o2, 7, %o2 92 brz,pn %o2, 2b 93 sllx %g4, 3, %g1 94 mov 0, %g2 95 add %g1, %o0, %o0 96 add %g1, %o1, %g4 97 mov 0, %g3 98 99 6: 100 101 ldub [%g2 + %g4], %g1 102 stb %g1, [%g2 + %o0] 103 add %g3, 1, %g2 104 cmp %o2, %g2 105 bne,pt %xcc, 6b 106 mov %g2, %g3 107 108 jmp %o7 + 8 /* exit point */ 109 mov %o3, %o0 96 110 97 111 /* … … 100 114 .global memcpy_from_uspace 101 115 memcpy_from_uspace: 102 mov %o0, %o3 ! save dst 103 add %o1, 7, %g1 104 and %g1, -8, %g1 105 cmp %o1, %g1 106 be,pn %xcc, 3f 107 add %o0, 7, %g1 108 mov 0, %g3 109 0: 110 brz,pn %o2, 2f 111 mov 0, %g2 112 1: 113 lduba [%g3 + %o1] ASI_AIUS, %g1 114 add %g2, 1, %g2 115 cmp %o2, %g2 116 stb %g1, [%g3 + %o0] 117 bne,pt %xcc, 1b 118 mov %g2, %g3 119 2: 120 jmp %o7 + 8 ! exit point 121 mov %o3, %o0 122 3: 123 and %g1, -8, %g1 124 cmp %o0, %g1 125 bne,pt %xcc, 0b 126 mov 0, %g3 127 srlx %o2, 3, %g4 128 brz,pn %g4, 5f 129 mov 0, %g5 130 4: 131 sllx %g3, 3, %g2 132 add %g5, 1, %g3 133 ldxa [%o1 + %g2] ASI_AIUS, %g1 134 mov %g3, %g5 135 cmp %g4, %g3 136 bne,pt %xcc, 4b 137 stx %g1, [%o0 + %g2] 138 5: 139 and %o2, 7, %o2 140 brz,pn %o2, 2b 141 sllx %g4, 3, %g1 142 mov 0, %g2 143 add %g1, %o0, %o0 144 add %g1, %o1, %g4 145 mov 0, %g3 146 6: 147 lduba [%g2 + %g4] ASI_AIUS, %g1 148 stb %g1, [%g2 + %o0] 149 add %g3, 1, %g2 150 cmp %o2, %g2 151 bne,pt %xcc, 6b 152 mov %g2, %g3 153 154 jmp %o7 + 8 ! exit point 155 mov %o3, %o0 116 mov %o0, %o3 /* save dst */ 117 add %o1, 7, %g1 118 and %g1, -8, %g1 119 cmp %o1, %g1 120 be,pn %xcc, 3f 121 add %o0, 7, %g1 122 mov 0, %g3 123 124 0: 125 126 brz,pn %o2, 2f 127 mov 0, %g2 128 129 1: 130 131 lduba [%g3 + %o1] ASI_AIUS, %g1 132 add %g2, 1, %g2 133 cmp %o2, %g2 134 stb %g1, [%g3 + %o0] 135 bne,pt %xcc, 1b 136 mov %g2, %g3 137 138 2: 139 140 jmp %o7 + 8 /* exit point */ 141 mov %o3, %o0 142 143 3: 144 145 and %g1, -8, %g1 146 cmp %o0, %g1 147 bne,pt %xcc, 0b 148 mov 0, %g3 149 srlx %o2, 3, %g4 150 brz,pn %g4, 5f 151 mov 0, %g5 152 153 4: 154 155 sllx %g3, 3, %g2 156 add %g5, 1, %g3 157 ldxa [%o1 + %g2] ASI_AIUS, %g1 158 mov %g3, %g5 159 cmp %g4, %g3 160 bne,pt %xcc, 4b 161 stx %g1, [%o0 + %g2] 162 163 5: 164 165 and %o2, 7, %o2 166 brz,pn %o2, 2b 167 sllx %g4, 3, %g1 168 mov 0, %g2 169 add %g1, %o0, %o0 170 add %g1, %o1, %g4 171 mov 0, %g3 172 173 6: 174 175 lduba [%g2 + %g4] ASI_AIUS, %g1 176 stb %g1, [%g2 + %o0] 177 add %g3, 1, %g2 178 cmp %o2, %g2 179 bne,pt %xcc, 6b 180 mov %g2, %g3 181 182 jmp %o7 + 8 /* exit point */ 183 mov %o3, %o0 156 184 157 185 /* … … 160 188 .global memcpy_to_uspace 161 189 memcpy_to_uspace: 162 mov %o0, %o3 ! save dst 163 add %o1, 7, %g1 164 and %g1, -8, %g1 165 cmp %o1, %g1 166 be,pn %xcc, 3f 167 add %o0, 7, %g1 168 mov 0, %g3 169 0: 170 brz,pn %o2, 2f 171 mov 0, %g2 172 1: 173 ldub [%g3 + %o1], %g1 174 add %g2, 1, %g2 175 cmp %o2, %g2 176 stba %g1, [%g3 + %o0] ASI_AIUS 177 bne,pt %xcc, 1b 178 mov %g2, %g3 179 2: 180 jmp %o7 + 8 ! exit point 181 mov %o3, %o0 182 3: 183 and %g1, -8, %g1 184 cmp %o0, %g1 185 bne,pt %xcc, 0b 186 mov 0, %g3 187 srlx %o2, 3, %g4 188 brz,pn %g4, 5f 189 mov 0, %g5 190 4: 191 sllx %g3, 3, %g2 192 add %g5, 1, %g3 193 ldx [%o1 + %g2], %g1 194 mov %g3, %g5 195 cmp %g4, %g3 196 bne,pt %xcc, 4b 197 stxa %g1, [%o0 + %g2] ASI_AIUS 198 5: 199 and %o2, 7, %o2 200 brz,pn %o2, 2b 201 sllx %g4, 3, %g1 202 mov 0, %g2 203 add %g1, %o0, %o0 204 add %g1, %o1, %g4 205 mov 0, %g3 206 6: 207 ldub [%g2 + %g4], %g1 208 stba %g1, [%g2 + %o0] ASI_AIUS 209 add %g3, 1, %g2 210 cmp %o2, %g2 211 bne,pt %xcc, 6b 212 mov %g2, %g3 213 214 jmp %o7 + 8 ! exit point 215 mov %o3, %o0 190 mov %o0, %o3 /* save dst */ 191 add %o1, 7, %g1 192 and %g1, -8, %g1 193 cmp %o1, %g1 194 be,pn %xcc, 3f 195 add %o0, 7, %g1 196 mov 0, %g3 197 198 0: 199 200 brz,pn %o2, 2f 201 mov 0, %g2 202 203 1: 204 205 ldub [%g3 + %o1], %g1 206 add %g2, 1, %g2 207 cmp %o2, %g2 208 stba %g1, [%g3 + %o0] ASI_AIUS 209 bne,pt %xcc, 1b 210 mov %g2, %g3 211 212 2: 213 214 jmp %o7 + 8 /* exit point */ 215 mov %o3, %o0 216 217 3: 218 219 and %g1, -8, %g1 220 cmp %o0, %g1 221 bne,pt %xcc, 0b 222 mov 0, %g3 223 srlx %o2, 3, %g4 224 brz,pn %g4, 5f 225 mov 0, %g5 226 227 4: 228 229 sllx %g3, 3, %g2 230 add %g5, 1, %g3 231 ldx [%o1 + %g2], %g1 232 mov %g3, %g5 233 cmp %g4, %g3 234 bne,pt %xcc, 4b 235 stxa %g1, [%o0 + %g2] ASI_AIUS 236 237 5: 238 239 and %o2, 7, %o2 240 brz,pn %o2, 2b 241 sllx %g4, 3, %g1 242 mov 0, %g2 243 add %g1, %o0, %o0 244 add %g1, %o1, %g4 245 mov 0, %g3 246 247 6: 248 249 ldub [%g2 + %g4], %g1 250 stba %g1, [%g2 + %o0] ASI_AIUS 251 add %g3, 1, %g2 252 cmp %o2, %g2 253 bne,pt %xcc, 6b 254 mov %g2, %g3 255 256 jmp %o7 + 8 /* exit point */ 257 mov %o3, %o0 216 258 217 259 .global memcpy_from_uspace_failover_address … … 219 261 memcpy_from_uspace_failover_address: 220 262 memcpy_to_uspace_failover_address: 221 jmp %o7 + 8 ! exit point222 mov %g0, %o0 ! return 0 on failure263 jmp %o7 + 8 /* exit point */ 264 mov %g0, %o0 /* return 0 on failure */ 223 265 224 266 .global memsetb … … 232 274 nop 233 275 276 .global early_putchar 277 early_putchar: 278 retl 279 nop -
kernel/arch/sparc64/src/trap/sun4v/interrupt.c
r4d1be48 re2ea4ab1 111 111 ((void (*)(void)) data1)(); 112 112 } else { 113 printf("Spurious interrupt on %d, data = % lx.\n",113 printf("Spurious interrupt on %d, data = %" PRIx64 ".\n", 114 114 CPU->arch.id, data1); 115 115 }
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