Changeset e2bf639 in mainline for kernel/arch/sparc64/include

Timestamp:

2006-09-05T21:06:59Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

d7e3f1ad

Parents:

5035eeb7

Message:

Handle more sparc64 traps and improve handling of already handled traps.

Location:

kernel/arch/sparc64/include/trap

Files:

• exception.h (modified) (2 diffs)
• mmu.h (modified) (4 diffs)

kernel/arch/sparc64/include/trap/exception.h

@@ -38 +38 @@
 
 #define TT_INSTRUCTION_ACCESS_EXCEPTION         0x08
+#define TT_INSTRUCTION_ACCESS_ERROR             0x0a
 #define TT_ILLEGAL_INSTRUCTION                  0x10
+#define TT_PRIVILEGED_OPCODE                    0x11
+#define TT_DIVISION_BY_ZERO                     0x28
+#define TT_DATA_ACCESS_EXCEPTION                0x30
 #define TT_DATA_ACCESS_ERROR                    0x32
 #define TT_MEM_ADDRESS_NOT_ALIGNED              0x34
+#define TT_PRIVILEGED_ACTION                    0x38
 
 #ifndef __ASM__
@@ -46 +51 @@
 #include <typedefs.h>
 
-extern void do_instruction_access_exc(int n, istate_t *istate);
-extern void do_mem_address_not_aligned(int n, istate_t *istate);
-extern void do_data_access_error(int n, istate_t *istate);
-extern void do_illegal_instruction(int n, istate_t *istate);
+extern void instruction_access_exception(int n, istate_t *istate);
+extern void instruction_access_error(int n, istate_t *istate);
+extern void illegal_instruction(int n, istate_t *istate);
+extern void privileged_opcode(int n, istate_t *istate);
+extern void division_by_zero(int n, istate_t *istate);
+extern void data_access_exception(int n, istate_t *istate);
+extern void data_access_error(int n, istate_t *istate);
+extern void mem_address_not_aligned(int n, istate_t *istate);
+extern void privileged_action(int n, istate_t *istate);
+
 
 #endif /* !__ASM__ */

kernel/arch/sparc64/include/trap/mmu.h

@@ -63 +63 @@
 .endm
 
-.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
+.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
         /*
          * First, try to refill TLB from TSB.
@@ -101 +101 @@
          */
 0:
-        HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
+.if (\tl > 0)
+        wrpr %g0, 1, %tl
+.endif
 
         wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
@@ -107 +109 @@
 .endm
 
-.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
+.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
         /*
          * First, try to refill TLB from TSB.
@@ -116 +118 @@
          * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
          */
-        HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
+.if (\tl > 0)
+        wrpr %g0, 1, %tl
+.endif
 
         wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
         PREEMPTIBLE_HANDLER fast_data_access_protection
-.endm
-
-.macro MEM_ADDRESS_NOT_ALIGNED_HANDLER
-        ba mem_address_not_aligned_handler
-        nop
-.endm
-
-/*
- * Macro used to lower TL when a MMU trap is caused by
- * the userspace register window spill or fill handler.
- */
-.macro HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
-        rdpr %tl, %g1
-        sub %g1, 1, %g2
-        brz %g2, 0f                     ! if TL was 1, skip
-        nop
-        wrpr %g2, 0, %tl                ! TL--
-        rdpr %tt, %g3
-        cmp %g3, TT_SPILL_1_NORMAL
-        be 0f                           ! trap from spill_1_normal?
-        cmp %g3, TT_FILL_1_NORMAL
-        bne,a 0f                        ! trap from fill_1_normal? (negated condition)
-        wrpr %g1, 0, %tl                ! TL++
-0:
 .endm