Changeset fd85ae5 in mainline for kernel/arch/sparc64/include

Timestamp:

2006-09-04T19:11:23Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

fadd381

Parents:

cfa70add

Message:

sparc64 kernel fixes

Location:

kernel/arch/sparc64/include

Files:

• asm.h (modified) (1 diff)
• trap/mmu.h (modified) (1 diff)

kernel/arch/sparc64/include/asm.h

@@ -322 +322 @@
 }
 
+/** Switch to nucleus by setting TL to 1. */
+static inline void nucleus_enter(void)
+{
+        __asm__ volatile ("wrpr %g0, 1, %tl\n");
+}
+
+/** Switch from nucleus by setting TL to 0. */
+static inline void nucleus_leave(void)
+{
+        __asm__ volatile ("wrpr %g0, %g0, %tl\n");
+}
+
 extern void cpu_halt(void);
 extern void cpu_sleep(void);

kernel/arch/sparc64/include/trap/mmu.h

@@ -122 +122 @@
 .endm
 
+.macro MEM_ADDRESS_NOT_ALIGNED_HANDLER
+        ba mem_address_not_aligned_handler
+        nop
+.endm
+
 /*
  * Macro used to lower TL when a MMU trap is caused by