Changeset da68871a in mainline for kernel/arch/ia32/src

Timestamp:

2012-08-08T08:46:22Z (13 years ago)

Author:

Adam Hraska <adam.hraska+hos@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

30c0826

Parents:

bc216a0 (diff), 1d01cca (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merged changes from mainline.

Location:

kernel/arch/ia32/src

Files:

• boot/multiboot.S (modified) (3 diffs)
• boot/multiboot2.S (modified) (2 diffs)
• boot/vesa_prot.inc (modified) (1 diff)
• boot/vesa_real.inc (modified) (1 diff)
• boot/vesa_ret.inc (modified) (1 diff)
• mm/page.c (modified) (1 diff)
• smp/apic.c (modified) (7 diffs)

kernel/arch/ia32/src/boot/multiboot.S

@@ -73 +73 @@
 
 multiboot_image_start:
+        cli
         cld
         
@@ -78 +79 @@
         movl $START_STACK, %esp
         
-        /* Initialize Global Descriptor Table register */
+        /*
+         * Initialize Global Descriptor Table and
+         * Interrupt Descriptor Table registers
+         */
         lgdtl bootstrap_gdtr
+        lidtl bootstrap_idtr
         
         /* Kernel data + stack */
@@ -701 +706 @@
 page_directory:
         .space 4096, 0
+
+.global bootstrap_idtr
+bootstrap_idtr:
+        .word 0
+        .long 0
 
 .global bootstrap_gdtr

kernel/arch/ia32/src/boot/multiboot2.S

@@ -114 +114 @@
 
 multiboot2_image_start:
+        cli
         cld
         
@@ -119 +120 @@
         movl $START_STACK, %esp
         
-        /* Initialize Global Descriptor Table register */
+        /*
+         * Initialize Global Descriptor Table and
+         * Interrupt Descriptor Table registers
+         */
         lgdtl bootstrap_gdtr
+        lidtl bootstrap_idtr
         
         /* Kernel data + stack */

kernel/arch/ia32/src/boot/vesa_prot.inc

@@ -88 +88 @@
                 /* Returned back to protected mode */
                 
+                /*
+                 * Initialize Global Descriptor Table and
+                 * Interrupt Descriptor Table registers
+                 */
+                lgdtl bootstrap_gdtr
+                lidtl bootstrap_idtr
+                
                 movzx %ax, %ecx
                 mov %ecx, KA2PA(bfb_scanline)

kernel/arch/ia32/src/boot/vesa_real.inc

@@ -30 +30 @@
 .code32
 vesa_init:
+        lidtl vesa_idtr
         jmp $GDT_SELECTOR(VESA_INIT_DES), $vesa_init_real - vesa_init
+
+vesa_idtr:
+        .word 0x3ff
+        .long 0
 
 .code16

kernel/arch/ia32/src/boot/vesa_ret.inc

@@ -1 +1 @@
 .code32
 vesa_init_protected:
+        cli
         cld
         

kernel/arch/ia32/src/mm/page.c

@@ -71 +71 @@
         for (cur = 0; cur < min(config.identity_size, config.physmem_end);
             cur += FRAME_SIZE) {
-                flags = PAGE_CACHEABLE | PAGE_WRITE;
-                if ((PA2KA(cur) >= config.base) &&
-                    (PA2KA(cur) < config.base + config.kernel_size))
-                        flags |= PAGE_GLOBAL;
+                flags = PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_WRITE | PAGE_READ;
                 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
         }

kernel/arch/ia32/src/smp/apic.c

@@ -259 +259 @@
 }
 
-static void ipi_wait_for_idle(void)
+/* Waits for the destination cpu to accept the previous ipi. */
+static void l_apic_wait_for_delivery(void)
 {
         icr_t icr;
         
-        /* Wait for the destination cpu to accept the previous ipi. */
         do {
                 icr.lo = l_apic[ICRlo];
@@ -281 +281 @@
 
         /* Wait for a destination cpu to accept our previous ipi. */
-        ipi_wait_for_idle();
+        l_apic_wait_for_delivery();
         
         icr.lo = l_apic[ICRlo];
@@ -298 +298 @@
         l_apic[ICRlo] = icr.lo;
         
-#ifdef CONFIG_DEBUG
-        icr.lo = l_apic[ICRlo];
-        if (icr.delivs == DELIVS_PENDING) {
-                printf("IPI is pending.\n");
-        }
-#endif
-        
         return apic_poll_errors();
 }
@@ -320 +313 @@
 
         /* Wait for a destination cpu to accept our previous ipi. */
-        ipi_wait_for_idle();
+        l_apic_wait_for_delivery();
         
         icr.lo = l_apic[ICRlo];
@@ -332 +325 @@
         l_apic[ICRlo] = icr.lo;
         
-        icr.lo = l_apic[ICRlo];
-        if (icr.delivs == DELIVS_PENDING) {
-#ifdef CONFIG_DEBUG
-                printf("IPI is pending.\n");
-#endif
-        }
-        
         return apic_poll_errors();
 }
@@ -379 +365 @@
                 return 0;
         
+        l_apic_wait_for_delivery();
+
         icr.lo = l_apic[ICRlo];
-        if (icr.delivs == DELIVS_PENDING) {
-#ifdef CONFIG_DEBUG
-                printf("IPI is pending.\n");
-#endif
-        }
-        
         icr.delmod = DELMOD_INIT;
         icr.destmod = DESTMOD_PHYS;
@@ -518 +500 @@
         dfr.model = MODEL_FLAT;
         l_apic[DFR] = dfr.value;
-        
-        if (CPU->arch.id != l_apic_id()) {
-#ifdef CONFIG_DEBUG
-                printf("lapic error: LAPIC ID (%" PRIu8 ") and hw ID assigned by BSP"
-                        " (%u) differ. Correcting to LAPIC ID.\n", l_apic_id(), 
-                        CPU->arch.id);
-#endif
-                CPU->arch.id = l_apic_id();
-        }
-        
 }