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r13c94f7	rd783145
45	45	PAGE_NOT_CACHEABLE);
46	46
	47	printf("irqmp regs: %p\n", irqc->regs);
	48
47	49	/* Mask all interrupts */
48		pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0);
	50	pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0);
49	51	}
50	52
…	…
64	66	void grlib_irqmp_clear(grlib_irqmp_t *irqc, int inum)
65	67	{
	68	inum++;
66	69	pio_write_32(&irqc->regs->clear, (1 << inum));
67	70	}
…	…
69	72	void grlib_irqmp_mask(grlib_irqmp_t *irqc, int src)
70	73	{
71		uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
	74	uint32_t mask = pio_read_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
72	75
	76	src++;
73	77	mask &= ~(1 << src);
74	78
75		pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
	79	pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
76	80	}
77	81
78	82	void grlib_irqmp_unmask(grlib_irqmp_t *irqc, int src)
79	83	{
80		uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
	84	uint32_t mask = pio_read_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
81	85
	86	src++;
82	87	mask \|= (1 << src);
83	88
84		pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
	89	pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
85	90	}
86	91

kernel/genarch/src/drivers/grlib_uart/grlib_uart.c

r13c94f7	rd783145
109	109	outdev_t *grlib_uart_init(uintptr_t paddr, inr_t inr)
110	110	{
	111	printf("grlib_uart_init: paddr=0x%08x\n", paddr);
	112
111	113	outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC);
112	114	if (!uart_dev)

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