Changeset d7365604 in mainline for kernel

Timestamp:

2009-10-22T17:45:31Z (16 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

af6cad4

Parents:

50989793 (diff), 5328d63 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge support for SYSENTER autodetection.

Location:

kernel/arch

Files:

• amd64/src/cpu/cpu.c (modified) (2 diffs)
• ia32/include/cpu.h (modified) (2 diffs)
• ia32/include/cpuid.h (modified) (1 diff)
• ia32/src/boot/boot.S (modified) (2 diffs)
• ia32/src/cpu/cpu.c (modified) (5 diffs)
• ia32/src/proc/scheduler.c (modified) (1 diff)
• ia32/src/userspace.c (modified) (1 diff)

kernel/arch/amd64/src/cpu/cpu.c

@@ -130 +130 @@
         CPU->arch.vendor = VendorUnknown;
         if (has_cpuid()) {
-                cpuid(0, &info);
+                cpuid(INTEL_CPUID_LEVEL, &info);
 
                 /*
@@ -150 +150 @@
                 }
                                 
-                cpuid(1, &info);
+                cpuid(INTEL_CPUID_STANDARD, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0xf;
                 CPU->arch.model = (info.cpuid_eax >> 4) & 0xf;

kernel/arch/ia32/include/cpu.h

@@ -50 +50 @@
 #include <arch/pm.h>
 #include <arch/asm.h>
+#include <arch/cpuid.h>
 
 typedef struct {
@@ -56 +57 @@
         unsigned int model;
         unsigned int stepping;
+        cpuid_feature_info fi;
+
         tss_t *tss;
         

kernel/arch/ia32/include/cpuid.h

@@ -63 +63 @@
 
 struct __cpuid_feature_info {
-        unsigned                        : 23;
+        unsigned      : 11;
+        unsigned sep  :  1;
+        unsigned      : 11;
         unsigned mmx  :  1;
         unsigned fxsr :  1;

kernel/arch/ia32/src/boot/boot.S

@@ -85 +85 @@
         pse_supported:
         
-        bt $(INTEL_SEP), %edx
-        jc sep_supported
-        
-                movl $sep_msg, %esi
-                jmp error_halt
-        
-        sep_supported:
-
 #include "vesa_prot.inc"
 
@@ -225 +217 @@
         .asciz "Page Size Extension not supported. System halted."
 
-sep_msg:
-        .asciz "SYSENTER/SYSEXIT not supported. System halted."

kernel/arch/ia32/src/cpu/cpu.c

@@ -92 +92 @@
 void cpu_arch_init(void)
 {
-        cpuid_feature_info fi;
         cpuid_extended_feature_info efi;
         cpu_info_t info;
@@ -102 +101 @@
         CPU->fpu_owner = NULL;
         
-        cpuid(1, &info);
+        cpuid(INTEL_CPUID_STANDARD, &info);
         
-        fi.word = info.cpuid_edx;
+        CPU->arch.fi.word = info.cpuid_edx;
         efi.word = info.cpuid_ecx;
         
-        if (fi.bits.fxsr)
+        if (CPU->arch.fi.bits.fxsr)
                 fpu_fxsr();
         else
                 fpu_fsr();
         
-        if (fi.bits.sse) {
+        if (CPU->arch.fi.bits.sse) {
                 asm volatile (
                         "mov %%cr4, %[help]\n"
@@ -122 +121 @@
         }
         
-        /* Setup fast SYSENTER/SYSEXIT syscalls */
-        syscall_setup_cpu();
+        if (CPU->arch.fi.bits.sep) {
+                /* Setup fast SYSENTER/SYSEXIT syscalls */
+                syscall_setup_cpu();
+        }
 }
 
@@ -132 +133 @@
         CPU->arch.vendor = VendorUnknown;
         if (has_cpuid()) {
-                cpuid(0, &info);
+                cpuid(INTEL_CPUID_LEVEL, &info);
 
                 /*
@@ -150 +151 @@
                         CPU->arch.vendor = VendorIntel;
                 
-                cpuid(1, &info);
+                cpuid(INTEL_CPUID_STANDARD, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
                 CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;

kernel/arch/ia32/src/proc/scheduler.c

@@ -61 +61 @@
             SP_DELTA];
         
-        /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
-        write_msr(IA32_MSR_SYSENTER_ESP, kstk);
+        if (CPU->arch.fi.bits.sep) {
+                /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
+                write_msr(IA32_MSR_SYSENTER_ESP, kstk);
+        }
         
         /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */

kernel/arch/ia32/src/userspace.c

@@ -70 +70 @@
                 "movl %[uarg], %%eax\n"
                 
-                /* %ebx is defined to hold pcb_ptr - set it to 0 */
-                "xorl %%ebx, %%ebx\n"
+                /* %edi is defined to hold pcb_ptr - set it to 0 */
+                "xorl %%edi, %%edi\n"
                 
                 "iret\n"