Changeset d3c9b60 in mainline for uspace/srv/hw/netif/dp8390/dp8390.c
- Timestamp:
- 2011-01-06T14:42:39Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 506a805
- Parents:
- 95ff5c4
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/srv/hw/netif/dp8390/dp8390.c
r95ff5c4 rd3c9b60 332 332 { 333 333 int dp_rcr_reg; 334 int i; //, r;334 int i; 335 335 336 336 /* General initialization */ … … 343 343 printf("%x%c", dep->de_address.ea_addr[i], i < 5 ? ':' : '\n'); 344 344 } 345 346 /* Initialization of the dp8390 following the mandatory procedure 345 346 /* 347 * Initialization of the dp8390 following the mandatory procedure 347 348 * in reference manual ("DP8390D/NS32490D NIC Network Interface 348 349 * Controller", National Semiconductor, July 1995, Page 29). 349 350 */ 351 350 352 /* Step 1: */ 351 353 outb_reg0(dep, DP_CR, CR_PS_P0 | CR_STP | CR_DM_ABORT); 354 352 355 /* Step 2: */ 353 356 if (dep->de_16bit) … … 355 358 else 356 359 outb_reg0(dep, DP_DCR, DCR_BYTEWIDE | DCR_8BYTES | DCR_BMS); 360 357 361 /* Step 3: */ 358 362 outb_reg0(dep, DP_RBCR0, 0); 359 363 outb_reg0(dep, DP_RBCR1, 0); 364 360 365 /* Step 4: */ 361 366 dp_rcr_reg = 0; 362 if (dep->de_flags &DEF_PROMISC) 367 368 if (dep->de_flags & DEF_PROMISC) 363 369 dp_rcr_reg |= RCR_AB | RCR_PRO | RCR_AM; 364 if (dep->de_flags &DEF_BROAD) 370 371 if (dep->de_flags & DEF_BROAD) 365 372 dp_rcr_reg |= RCR_AB; 366 if (dep->de_flags &DEF_MULTI) 373 374 if (dep->de_flags & DEF_MULTI) 367 375 dp_rcr_reg |= RCR_AM; 376 368 377 outb_reg0(dep, DP_RCR, dp_rcr_reg); 378 369 379 /* Step 5: */ 370 380 outb_reg0(dep, DP_TCR, TCR_INTERNAL); 381 371 382 /* Step 6: */ 372 383 outb_reg0(dep, DP_BNRY, dep->de_startpage); 373 384 outb_reg0(dep, DP_PSTART, dep->de_startpage); 374 385 outb_reg0(dep, DP_PSTOP, dep->de_stoppage); 386 375 387 /* Step 7: */ 376 388 outb_reg0(dep, DP_ISR, 0xFF); 389 377 390 /* Step 8: */ 378 391 outb_reg0(dep, DP_IMR, IMR_PRXE | IMR_PTXE | IMR_RXEE | IMR_TXEE | 379 IMR_OVWE | IMR_CNTE); 392 IMR_OVWE | IMR_CNTE); 393 380 394 /* Step 9: */ 381 395 outb_reg0(dep, DP_CR, CR_PS_P1 | CR_DM_ABORT | CR_STP); 382 396 383 397 outb_reg1(dep, DP_PAR0, dep->de_address.ea_addr[0]); 384 398 outb_reg1(dep, DP_PAR1, dep->de_address.ea_addr[1]); … … 387 401 outb_reg1(dep, DP_PAR4, dep->de_address.ea_addr[4]); 388 402 outb_reg1(dep, DP_PAR5, dep->de_address.ea_addr[5]); 389 403 390 404 outb_reg1(dep, DP_MAR0, 0xff); 391 405 outb_reg1(dep, DP_MAR1, 0xff); … … 396 410 outb_reg1(dep, DP_MAR6, 0xff); 397 411 outb_reg1(dep, DP_MAR7, 0xff); 398 412 399 413 outb_reg1(dep, DP_CURR, dep->de_startpage + 1); 414 400 415 /* Step 10: */ 401 416 outb_reg0(dep, DP_CR, CR_DM_ABORT | CR_STA); 417 402 418 /* Step 11: */ 403 419 outb_reg0(dep, DP_TCR, TCR_NORMAL); 404 405 inb_reg0(dep, DP_CNTR0); /* reset counters by reading */420 421 inb_reg0(dep, DP_CNTR0); /* Reset counters by reading */ 406 422 inb_reg0(dep, DP_CNTR1); 407 423 inb_reg0(dep, DP_CNTR2); 408 424 409 425 /* Finish the initialization. */ 410 426 dep->de_flags |= DEF_ENABLED; 411 for (i = 0; i<dep->de_sendq_nr; i++)427 for (i = 0; i < dep->de_sendq_nr; i++) 412 428 dep->de_sendq[i].sq_filled= 0; 413 dep->de_sendq_head= 0; 414 dep->de_sendq_tail= 0; 415 if (dep->de_16bit) 416 { 429 430 dep->de_sendq_head = 0; 431 dep->de_sendq_tail = 0; 432 433 if (dep->de_16bit) { 417 434 dep->de_user2nicf= dp_pio16_user2nic; 418 // dep->de_user2nicf_s= dp_pio16_user2nic_s;419 435 dep->de_nic2userf= dp_pio16_nic2user; 420 // dep->de_nic2userf_s= dp_pio16_nic2user_s;421 436 dep->de_getblockf= dp_pio16_getblock; 422 } 423 else 424 { 437 } else { 425 438 dep->de_user2nicf= dp_pio8_user2nic; 426 // dep->de_user2nicf_s= dp_pio8_user2nic_s;427 439 dep->de_nic2userf= dp_pio8_nic2user; 428 // dep->de_nic2userf_s= dp_pio8_nic2user_s;429 440 dep->de_getblockf= dp_pio8_getblock; 430 441 } 431 432 /* Set the interrupt handler and policy. Do not automatically 433 * reenable interrupts. Return the IRQ line number on interrupts. 434 */ 435 /* dep->de_hook = dep->de_irq; 436 r= sys_irqsetpolicy(dep->de_irq, 0, &dep->de_hook); 437 if (r != OK) 438 panic("DP8390", "sys_irqsetpolicy failed", r); 439 440 r= sys_irqenable(&dep->de_hook); 441 if (r != OK) 442 { 443 panic("DP8390", "unable enable interrupts", r); 444 } 445 */ 446 } 447 448 /*===========================================================================* 449 * dp_reinit * 450 *===========================================================================*/ 442 } 443 451 444 static void dp_reinit(dep) 452 445 dpeth_t *dep;
Note:
See TracChangeset
for help on using the changeset viewer.