Changeset d1582b50 in mainline for kernel/arch/arm32/src

Timestamp:

2020-12-14T20:41:53Z (5 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

02fe42e

Parents:

1382446

git-author:

Jiri Svoboda <jiri@…> (2020-12-14 20:33:54)

git-committer:

Jiri Svoboda <jiri@…> (2020-12-14 20:41:53)

Message:

Fix spacing in single-line comments using latest ccheck

This found incorrectly formatted section comments (with blocks of
asterisks or dashes). I strongly believe against using section comments
but I am not simply removing them since that would probably be
controversial.

Location:

kernel/arch/arm32/src

Files:

• fpu_context.c (modified) (1 diff)
• mach/beagleboardxm/beagleboardxm.c (modified) (1 diff)
• mach/gta02/gta02.c (modified) (1 diff)
• mach/integratorcp/integratorcp.c (modified) (1 diff)
• mach/raspberrypi/raspberrypi.c (modified) (1 diff)
• mm/page_fault.c (modified) (1 diff)

kernel/arch/arm32/src/fpu_context.c

@@ -186 +186 @@
         uint32_t mvfr0;
 
-        /* Enable coprocessor access*/
+        /* Enable coprocessor access */
         fpu_enable_coprocessor_access();
 

kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c

@@ -158 +158 @@
                 spinlock_unlock(&irq->lock);
         } else {
-                /* Spurious interrupt.*/
+                /* Spurious interrupt. */
                 printf("cpu%d: spurious interrupt (inum=%d)\n",
                     CPU->id, inum);

kernel/arch/arm32/src/mach/gta02/gta02.c

@@ -148 +148 @@
                 spinlock_unlock(&irq->lock);
         } else {
-                /* Spurious interrupt.*/
+                /* Spurious interrupt. */
                 log(LF_ARCH, LVL_DEBUG, "cpu%d: spurious interrupt (inum=%d)",
                     CPU->id, inum);

kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

@@ -270 +270 @@
                                 spinlock_unlock(&irq->lock);
                         } else {
-                                /* Spurious interrupt.*/
+                                /* Spurious interrupt. */
                                 log(LF_ARCH, LVL_DEBUG,
                                     "cpu%d: spurious interrupt (inum=%d)",

kernel/arch/arm32/src/mach/raspberrypi/raspberrypi.c

@@ -161 +161 @@
                 spinlock_unlock(&irq->lock);
         } else {
-                /* Spurious interrupt.*/
+                /* Spurious interrupt. */
                 printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum);
                 bcm2835_irc_disable(raspi.irc, inum);

kernel/arch/arm32/src/mm/page_fault.c

@@ -161 +161 @@
         } ls_inst[] = {
                 /* Store word/byte */
-                { 0x0e100000, 0x04000000, PF_ACCESS_WRITE }, /*STR(B) imm*/
-                { 0x0e100010, 0x06000000, PF_ACCESS_WRITE }, /*STR(B) reg*/
+                { 0x0e100000, 0x04000000, PF_ACCESS_WRITE }, /* STR(B) imm */
+                { 0x0e100010, 0x06000000, PF_ACCESS_WRITE }, /* STR(B) reg */
                 /* Load word/byte */
-                { 0x0e100000, 0x04100000, PF_ACCESS_READ }, /*LDR(B) imm*/
-                { 0x0e100010, 0x06100000, PF_ACCESS_READ }, /*LDR(B) reg*/
+                { 0x0e100000, 0x04100000, PF_ACCESS_READ }, /* LDR(B) imm */
+                { 0x0e100010, 0x06100000, PF_ACCESS_READ }, /* LDR(B) reg */
                 /* Store half-word/dual  A5.2.8 */
-                { 0x0e1000b0, 0x000000b0, PF_ACCESS_WRITE }, /*STRH imm reg*/
+                { 0x0e1000b0, 0x000000b0, PF_ACCESS_WRITE }, /* STRH imm reg */
                 /* Load half-word/dual A5.2.8 */
-                { 0x0e0000f0, 0x000000d0, PF_ACCESS_READ }, /*LDRH imm reg*/
-                { 0x0e1000b0, 0x001000b0, PF_ACCESS_READ }, /*LDRH imm reg*/
+                { 0x0e0000f0, 0x000000d0, PF_ACCESS_READ }, /* LDRH imm reg */
+                { 0x0e1000b0, 0x001000b0, PF_ACCESS_READ }, /* LDRH imm reg */
                 /* Block data transfer, Store */
                 { 0x0e100000, 0x08000000, PF_ACCESS_WRITE }, /* STM variants */