Changeset c2b95d3 in mainline for arch/ia64/include/mm/page.h
- Timestamp:
- 2006-01-26T22:52:00Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 849386a
- Parents:
- 2a003d5b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/mm/page.h
r2a003d5b rc2b95d3 1 1 /* 2 * Copyright (C) 2005 Jakub Jermar 2 * Copyright (C) 2005 - 2006 Jakub Jermar 3 * Copyright (C) 2006 Jakub Vana 3 4 * All rights reserved. 4 5 * … … 30 31 #define __ia64_PAGE_H__ 31 32 33 #include <arch/mm/frame.h> 34 #include <genarch/mm/page_ht.h> 32 35 #include <arch/types.h> 33 #include <arch/mm/frame.h> 36 #include <typedefs.h> 37 #include <debug.h> 34 38 35 39 #define PAGE_SIZE FRAME_SIZE … … 52 56 #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags) 53 57 54 #define REGION_RID_MAIN 0 55 #define REGION_RID_FIRST_INVALID 16 56 #define REGION_REGISTERS 8 57 58 #define VHPT_WIDTH 16 /*64kB*/ 59 #define VHPT_SIZE (1<<VHPT_WIDTH) 60 61 #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ 62 63 struct VHPT_tag_info 64 { 65 unsigned long long tag :63; 66 unsigned ti : 1; 67 }__attribute__ ((packed)); 68 69 union VHPT_tag 70 { 71 struct VHPT_tag_info tag_info; 72 unsigned tag_word; 58 #define VRN_KERNEL 0 59 #define REGION_REGISTERS 8 60 61 #define VHPT_WIDTH 20 /* 1M */ 62 #define VHPT_SIZE (1<<VHPT_WIDTH) 63 64 #define VHPT_BASE page_ht /* Must be aligned to VHPT_SIZE */ 65 66 struct vhpt_tag_info { 67 unsigned long long tag : 63; 68 unsigned ti : 1; 69 } __attribute__ ((packed)); 70 71 union vhpt_tag { 72 struct vhpt_tag_info tag_info; 73 unsigned tag_word; 73 74 }; 74 75 75 struct VHPT_entry_present 76 { 77 76 struct vhpt_entry_present { 78 77 /* Word 0 */ 79 unsigned p 80 unsigned rv0: 1;81 unsigned ma 82 unsigned a 83 unsigned d 84 unsigned pl 85 unsigned ar 86 unsigned long long ppn :38;87 unsigned rv1: 2;88 unsigned ed 89 unsigned ig1 :11;78 unsigned p : 1; 79 unsigned : 1; 80 unsigned ma : 3; 81 unsigned a : 1; 82 unsigned d : 1; 83 unsigned pl : 2; 84 unsigned ar : 3; 85 unsigned long long ppn : 38; 86 unsigned : 2; 87 unsigned ed : 1; 88 unsigned ig1 : 11; 90 89 91 90 /* Word 1 */ 92 unsigned rv2: 2;93 unsigned ps 94 unsigned key :24;95 unsigned rv3 :32;91 unsigned : 2; 92 unsigned ps : 6; 93 unsigned key : 24; 94 unsigned : 32; 96 95 97 96 /* Word 2 */ 98 union VHPT_tag tag; /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/99 /* But I'm almost sure we nead access to whole word so there are both possibilities*/ 97 union vhpt_tag tag; 98 100 99 /* Word 3 */ 101 unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/ 102 103 }__attribute__ ((packed)); 104 105 struct VHPT_entry_not_present 106 { 100 unsigned long long next : 64; /**< Collision chain next pointer. */ 101 } __attribute__ ((packed)); 102 103 struct vhpt_entry_not_present { 107 104 /* Word 0 */ 108 unsigned p 109 unsigned long long ig0 :52;110 unsigned ig1 :11;105 unsigned p : 1; 106 unsigned long long ig0 : 52; 107 unsigned ig1 : 11; 111 108 112 109 /* Word 1 */ 113 unsigned rv2 : 2; 114 unsigned ps : 6; 115 unsigned long long ig2 :56; 116 117 110 unsigned : 2; 111 unsigned ps : 6; 112 unsigned long long ig2 : 56; 113 118 114 /* Word 2 */ 119 union VHPT_tag tag; /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/120 /* But I'm almost sure we nead access to whole word so there are both possibilities*/ 115 union vhpt_tag tag; 116 121 117 /* Word 3 */ 122 unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/ 123 124 }__attribute__ ((packed)); 125 126 typedef union VHPT_entry 127 { 128 struct VHPT_entry_present present; 129 struct VHPT_entry_not_present not_present; 130 }VHPT_entry; 118 unsigned long long next : 64; /**< Collision chain next pointer. */ 119 120 } __attribute__ ((packed)); 121 122 typedef union vhpt_entry { 123 struct vhpt_entry_present present; 124 struct vhpt_entry_not_present not_present; 125 } vhpt_entry; 126 127 struct region_register_map { 128 unsigned ve : 1; 129 unsigned : 1; 130 unsigned ps : 6; 131 unsigned rid : 24; 132 unsigned : 32; 133 } __attribute__ ((packed)); 134 135 typedef union region_register { 136 struct region_register_map map; 137 unsigned long long word; 138 } region_register; 139 140 struct pta_register_map { 141 unsigned ve : 1; 142 unsigned : 1; 143 unsigned size : 6; 144 unsigned vf : 1; 145 unsigned : 6; 146 unsigned long long base : 49; 147 } __attribute__ ((packed)); 148 149 typedef union pta_register { 150 struct pta_register_map map; 151 __u64 word; 152 } pta_register; 153 154 /** Return Translation Hashed Entry Address. 155 * 156 * VRN bits are used to read RID (ASID) from one 157 * of the eight region registers registers. 158 * 159 * @param va Virtual address including VRN bits. 160 * 161 * @return Address of the head of VHPT collision chain. 162 */ 163 static inline __u64 thash(__u64 va) 164 { 165 __u64 ret; 166 167 __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); 168 169 return ret; 170 } 171 172 /** Return Translation Hashed Entry Tag. 173 * 174 * VRN bits are used to read RID (ASID) from one 175 * of the eight region registers. 176 * 177 * @param va Virtual address including VRN bits. 178 * 179 * @return The unique tag for VPN and RID in the collision chain returned by thash(). 180 */ 181 static inline __u64 ttag(__u64 va) 182 { 183 __u64 ret; 184 185 __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); 186 187 return ret; 188 } 189 190 /** Read Region Register. 191 * 192 * @param i Region register index. 193 * 194 * @return Current contents of rr[i]. 195 */ 196 static inline __u64 rr_read(index_t i) 197 { 198 __u64 ret; 199 200 // ASSERT(i < REGION_REGISTERS); 201 __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); 202 203 return ret; 204 } 205 206 207 /** Write Region Register. 208 * 209 * @param i Region register index. 210 * @param v Value to be written to rr[i]. 211 */ 212 static inline void rr_write(index_t i, __u64 v) 213 { 214 // ASSERT(i < REGION_REGISTERS); 215 __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v)); 216 } 217 218 /** Read Page Table Register. 219 * 220 * @return Current value stored in PTA. 221 */ 222 static inline __u64 pta_read(void) 223 { 224 __u64 ret; 225 226 __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); 227 228 return ret; 229 } 230 231 /** Write Page Table Register. 232 * 233 * @param v New value to be stored in PTA. 234 */ 235 static inline void pta_write(__u64 v) 236 { 237 __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); 238 } 131 239 132 240 extern void page_arch_init(void); 133 241 134 135 struct region_register_map136 {137 unsigned ve : 1;138 unsigned r0 : 1;139 unsigned ps : 6;140 unsigned rid :24;141 unsigned r1 :32;142 }__attribute__ ((packed));143 144 145 typedef union region_register146 {147 struct region_register_map map;148 unsigned long long word;149 }region_register;150 151 struct PTA_register_map152 {153 unsigned ve : 1;154 unsigned r0 : 1;155 unsigned size : 6;156 unsigned vf : 1;157 unsigned r1 : 6;158 unsigned long long base:49;159 }__attribute__ ((packed));160 161 162 typedef union PTA_register163 {164 struct PTA_register_map map;165 unsigned long long word;166 }PTA_register;167 168 169 242 #endif
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