Changeset b6fba84 in mainline for arch/sparc64/src/mm/tlb.c

Timestamp:

2006-02-24T11:58:09Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

68656282

Parents:

0d3ff9a

Message:

sparc64 work.
Add more MMU helper functions and make data TLB miss handler more verbose.

File:

• arch/sparc64/src/mm/tlb.c (modified) (3 diffs)

arch/sparc64/src/mm/tlb.c

@@ -38 +38 @@
 #include <arch/trap/trap.h>
 #include <panic.h>
+#include <arch/asm.h>
+#include <symtab.h>
+
+char *context_encoding[] = {
+        "Primary",
+        "Secondary",
+        "Nucleus",
+        "Reserved"
+};
 
 /** Initialize ITLB and DTLB.
@@ -97 +106 @@
         dmmu_enable();
         immu_enable();
+        
+        /*
+         * Quick hack: map frame buffer
+         */
+        fr.address = 0x1C901000000ULL;
+        pg.address = 0xc0000000;
+
+        tag.value = 0;
+        tag.vpn = pg.vpn;
+
+        dtlb_tag_access_write(tag.value);
+
+        data.value = 0;
+        data.v = true;
+        data.size = PAGESIZE_4M;
+        data.pfn = fr.pfn;
+        data.l = true;
+        data.cp = 0;
+        data.cv = 0;
+        data.p = true;
+        data.w = true;
+        data.g = true;
+
+        dtlb_data_in_write(data.value);
+
 }
 
@@ -108 +142 @@
 void fast_data_access_mmu_miss(void)
 {
+        tlb_sfsr_reg_t status;
+        __address address, tpc;
+        char *tpc_str;
+        
+        status.value = dtlb_sfsr_read();
+        address = dtlb_sfar_read();
+        tpc = tpc_read();
+        tpc_str = get_symtab_entry(tpc);
+
+        printf("ASI=%B, Context=%s\n", status.asi, context_encoding[status.ct]);
+        printf("Faulting address: %P\n", dtlb_sfar_read());
+        printf("TPC=%P, (%s)\n", tpc, tpc_str ? tpc_str : "?");
         panic("%s\n", __FUNCTION__);
 }