Changeset b3e8c90 in mainline for kernel/arch/sparc64/include/mm


Ignore:
Timestamp:
2006-08-01T11:24:27Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e386cbf
Parents:
c049309
Message:

sparc64 work.

  1. Formatting fixes.
  2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
  3. Substantial changes in the way the TLB is taken over.
  4. Remove unneeded functions.

This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.

Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow.

Location:
kernel/arch/sparc64/include/mm
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/mm/mmu.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    3535#ifndef __sparc64_MMU_H__
    3636#define __sparc64_MMU_H__
    37 
    38 #include <arch/asm.h>
    39 #include <arch/barrier.h>
    40 #include <arch/types.h>
    41 #include <typedefs.h>
    4237
    4338/** LSU Control Register ASI. */
    … …  
    8075#define VA_DMMU_PA_WATCHPOINT_REG       0x40    /**< DMMU PA data watchpoint register. */
    8176
     77#ifndef __ASM__
     78
     79#include <arch/asm.h>
     80#include <arch/barrier.h>
     81#include <arch/types.h>
     82#include <typedefs.h>
    8283
    8384/** LSU Control Register. */
    … …  
    103104typedef union lsu_cr_reg lsu_cr_reg_t;
    104105
    105 
    106 #define immu_enable()   immu_set(true)
    107 #define immu_disable()  immu_set(false)
    108 #define dmmu_enable()   dmmu_set(true)
    109 #define dmmu_disable()  dmmu_set(false)
    110 
    111 /** Disable or Enable IMMU. */
    112 static inline void immu_set(bool enable)
    113 {
    114         lsu_cr_reg_t cr;
    115        
    116         cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
    117         cr.im = enable;
    118         asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
    119         membar();
    120 }
    121 
    122 /** Disable or Enable DMMU. */
    123 static inline void dmmu_set(bool enable)
    124 {
    125         lsu_cr_reg_t cr;
    126        
    127         cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0);
    128         cr.dm = enable;
    129         asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value);
    130         membar();
    131 }
     106#endif /* !__ASM__ */
    132107
    133108#endif
    134109
    135  /** @}
     110/** @}
    136111 */
    137 

  • kernel/arch/sparc64/include/mm/page.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    6666#endif
    6767
    68  /** @}
     68/** @}
    6969 */
    70 

  • kernel/arch/sparc64/include/mm/tlb.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    228228        reg.tlb_entry = entry;
    229229        asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
    230         flush();
     230        membar();
    231231}
    232232
    … …  
    287287{
    288288        asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
    289         flush();
     289        membar();
    290290}
    291291
    … …  
    317317{
    318318        asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
    319         flush();
     319        membar();
    320320}
    321321
    … …  
    355355{
    356356        asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
    357         flush();
     357        membar();
    358358}
    359359
    … …  
    408408       
    409409        asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
    410         flush();
     410        membar();
    411411}
    412412
    … …  
    419419#endif
    420420
    421  /** @}
    422  */
    423 
     421/** @}
     422 */

  • kernel/arch/sparc64/include/mm/tte.h

    rc049309 rb3e8c90  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    7878#endif
    7979
    80  /** @}
     80/** @}
    8181 */
    82 
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