Changeset a35b458 in mainline for kernel/arch/ppc32/src/asm.S

Timestamp:

2018-03-02T20:10:49Z (7 years ago)

Author:

Jiří Zárevúcky <zarevucky.jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f1380b7

Parents:

3061bc1

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)

git-committer:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)

Message:

style: Remove trailing whitespace on _all_ lines, including empty ones, for particular file types.

Command used: tools/srepl '\s\+$' '' -- *.c *.h *.py *.sh *.s *.S *.ag

Currently, whitespace on empty lines is very inconsistent.
There are two basic choices: Either remove the whitespace, or keep empty lines
indented to the level of surrounding code. The former is AFAICT more common,
and also much easier to do automatically.

Alternatively, we could write script for automatic indentation, and use that
instead. However, if such a script exists, it's possible to use the indented
style locally, by having the editor apply relevant conversions on load/save,
without affecting remote repository. IMO, it makes more sense to adopt
the simpler rule.

File:

• kernel/arch/ppc32/src/asm.S (modified) (7 diffs)

kernel/arch/ppc32/src/asm.S

@@ -40 +40 @@
          * r5 = entry
          */
-        
+
         /* Disable interrupts */
-        
+
         mfmsr r31
         rlwinm r31, r31, 0, 17, 15
         mtmsr r31
         isync
-        
+
         /* Set entry point */
-        
+
         mtsrr0 r5
-        
+
         /* Set privileged state, enable interrupts */
-        
+
         ori r31, r31, MSR_PR
         ori r31, r31, MSR_EE
         mtsrr1 r31
-        
+
         /* Set stack */
-        
+
         mr sp, r4
-        
+
         /* %r6 is defined to hold pcb_ptr - set it to 0 */
-        
+
         xor r6, r6, r6
-        
+
         /* Jump to userspace */
-        
+
         rfi
 FUNCTION_END(userspace_asm)
@@ -73 +73 @@
 SYMBOL(iret)
         /* Disable interrupts */
-        
+
         mfmsr r31
         rlwinm r31, r31, 0, 17, 15
         mtmsr r31
         isync
-        
+
         lwz r0, ISTATE_OFFSET_R0(sp)
         lwz r2, ISTATE_OFFSET_R2(sp)
@@ -109 +109 @@
         lwz r30, ISTATE_OFFSET_R30(sp)
         lwz r31, ISTATE_OFFSET_R31(sp)
-        
+
         lwz r12, ISTATE_OFFSET_CR(sp)
         mtcr r12
-        
+
         lwz r12, ISTATE_OFFSET_PC(sp)
         mtsrr0 r12
-        
+
         lwz r12, ISTATE_OFFSET_SRR1(sp)
         mtsrr1 r12
-        
+
         lwz r12, ISTATE_OFFSET_LR(sp)
         mtlr r12
-        
+
         lwz r12, ISTATE_OFFSET_CTR(sp)
         mtctr r12
-        
+
         lwz r12, ISTATE_OFFSET_XER(sp)
         mtxer r12
-        
+
         lwz r12, ISTATE_OFFSET_R12(sp)
         lwz sp, ISTATE_OFFSET_SP(sp)
-        
+
         rfi
 
 SYMBOL(iret_syscall)
         /* Disable interrupts */
-        
+
         mfmsr r31
         rlwinm r31, r31, 0, 17, 15
         mtmsr r31
         isync
-        
+
         lwz r0, ISTATE_OFFSET_R0(sp)
         lwz r2, ISTATE_OFFSET_R2(sp)
@@ -170 +170 @@
         lwz r30, ISTATE_OFFSET_R30(sp)
         lwz r31, ISTATE_OFFSET_R31(sp)
-        
+
         lwz r12, ISTATE_OFFSET_CR(sp)
         mtcr r12
-        
+
         lwz r12, ISTATE_OFFSET_PC(sp)
         mtsrr0 r12
-        
+
         lwz r12, ISTATE_OFFSET_SRR1(sp)
         mtsrr1 r12
-        
+
         lwz r12, ISTATE_OFFSET_LR(sp)
         mtlr r12
-        
+
         lwz r12, ISTATE_OFFSET_CTR(sp)
         mtctr r12
-        
+
         lwz r12, ISTATE_OFFSET_XER(sp)
         mtxer r12
-        
+
         lwz r12, ISTATE_OFFSET_R12(sp)
         lwz sp, ISTATE_OFFSET_SP(sp)
-        
+
         rfi
 
@@ -200 +200 @@
         addi r4, r4, -4
         beq 2f
-        
+
         andi. r0, r6, 3
         mtctr r7
         bne 5f
-        
+
         1:
-        
+
                 lwz r7, 4(r4)
                 lwzu r8, 8(r4)
@@ -212 +212 @@
                 stwu r8, 8(r6)
                 bdnz 1b
-                
+
                 andi. r5, r5, 7
-        
+
         2:
-        
+
                 cmplwi 0, r5, 4
                 blt 3f
-                
+
                 lwzu r0, 4(r4)
                 addi r5, r5, -4
                 stwu r0, 4(r6)
-        
+
         3:
-        
+
                 cmpwi 0, r5, 0
                 beqlr
@@ -231 +231 @@
                 addi r4, r4, 3
                 addi r6, r6, 3
-        
+
         4:
-        
+
                 lbzu r0, 1(r4)
                 stbu r0, 1(r6)
                 bdnz 4b
                 blr
-        
+
         5:
-        
+
                 subfic r0, r0, 4
                 mtctr r0
-        
+
         6:
-        
+
                 lbz r7, 4(r4)
                 addi r4, r4, 1