Changeset a0d74fd in mainline for arch/ia64/include/mm/page.h

Timestamp:

2006-03-01T11:07:04Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

9ad03fe

Parents:

2c49fbbe

Message:

ia64 work.
Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler.
Add before_thread_runs_arch() that maps kstack, if necessary.
Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.

File:

• arch/ia64/include/mm/page.h (modified) (6 diffs)

arch/ia64/include/mm/page.h

@@ -31 +31 @@
 #define __ia64_PAGE_H__
 
+#define PAGE_SIZE       FRAME_SIZE
+#define PAGE_WIDTH      FRAME_WIDTH
+
+/** Bit width of the TLB-locked portion of kernel address space. */
+#define KERNEL_PAGE_WIDTH       28      /* 256M */
+
+#define SET_PTL0_ADDRESS_ARCH(x)        /**< To be removed as situation permits. */
+
+#define PPN_SHIFT                       12
+
+#define VRN_SHIFT                       61
+#define VRN_MASK                        (7LL << VRN_SHIFT)
+#define VA2VRN(va)                      ((va)>>VRN_SHIFT)
+
+#ifdef __ASM__
+#define VRN_KERNEL                      7
+#else
+#define VRN_KERNEL                      7LL
+#endif
+
+#define REGION_REGISTERS                8
+
+#define KA2PA(x)        ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
+#define PA2KA(x)        ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
+
+#define VHPT_WIDTH                      20              /* 1M */
+#define VHPT_SIZE                       (1 << VHPT_WIDTH)
+#define VHPT_BASE                       0               /* Must be aligned to VHPT_SIZE */
+
+#define PTA_BASE_SHIFT                  15
+
+/** Memory Attributes. */
+#define MA_WRITEBACK    0x0
+#define MA_UNCACHEABLE  0x4
+
+/** Privilege Levels. Only the most and the least privileged ones are ever used. */
+#define PL_KERNEL       0x0
+#define PL_USER         0x3
+
+/* Access Rigths. Only certain combinations are used by the kernel. */
+#define AR_READ         0x0
+#define AR_EXECUTE      0x1
+#define AR_WRITE        0x2
+
 #ifndef __ASM__
-
 
 #include <arch/mm/frame.h>
@@ -41 +84 @@
 #include <typedefs.h>
 #include <debug.h>
-
-#endif
-
-#define PAGE_SIZE       FRAME_SIZE
-#define PAGE_WIDTH      FRAME_WIDTH
-#define KERNEL_PAGE_WIDTH       28
-
-
-
-#define SET_PTL0_ADDRESS_ARCH(x)        /**< To be removed as situation permits. */
-
-#define PPN_SHIFT                       12
-
-#define VRN_SHIFT                       61
-#define VRN_MASK                        (7LL << VRN_SHIFT)
-
-#ifdef __ASM__
-#define VRN_KERNEL                      7
-#else
-#define VRN_KERNEL                      7LL
-#endif
-
-#define REGION_REGISTERS                8
-
-#define KA2PA(x)        ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
-#define PA2KA(x)        ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
-
-
-#define VHPT_WIDTH                      20              /* 1M */
-#define VHPT_SIZE                       (1 << VHPT_WIDTH)
-#define VHPT_BASE                       0               /* Must be aligned to VHPT_SIZE */
-
-#define PTA_BASE_SHIFT                  15
-
-/** Memory Attributes. */
-#define MA_WRITEBACK    0x0
-#define MA_UNCACHEABLE  0x4
-
-/** Privilege Levels. Only the most and the least privileged ones are ever used. */
-#define PL_KERNEL       0x0
-#define PL_USER         0x3
-
-/* Access Rigths. Only certain combinations are used by the kernel. */
-#define AR_READ         0x0
-#define AR_EXECUTE      0x1
-#define AR_WRITE        0x2
-
-
-#define VA_REGION_INDEX 61
-
-#define VA_REGION(va) (va>>VA_REGION_INDEX)
-
-#ifndef __ASM__
 
 struct vhpt_tag_info {
@@ -156 +146 @@
 } vhpt_entry_t;
 
-typedef vhpt_entry_t tlb_entry_t;
-
 struct region_register_map {
         unsigned ve : 1;
@@ -231 +219 @@
         __u64 ret;
         ASSERT(i < REGION_REGISTERS);
-        i=i<<VRN_SHIFT;
-        __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
-        
-        return ret;
-}
-
+        __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
+        return ret;
+}
 
 /** Write Region Register.
@@ -246 +231 @@
 {
         ASSERT(i < REGION_REGISTERS);
-        i=i<<VRN_SHIFT;
         __asm__ volatile (
-        "mov rr[%0] = %1;;\n" 
-        : 
-        : "r" (i), "r" (v));
+                "mov rr[%0] = %1\n" 
+                : 
+                : "r" (i << VRN_SHIFT), "r" (v)
+        );
 }
  
@@ -281 +266 @@
 extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
-
-
 #endif
 
 #endif
-
-