Changeset 97f1691 in mainline for arch/sparc64

Timestamp:

2006-02-28T00:02:39Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

7d6ec87

Parents:

d87c3f3

Message:

sparc64 work.
Fix KBD_VIRT_ADDRESS.
Call before_thread_runs() prior to the switch to the thread's stack. Add comment why this is crucial.
Add after_thread_ran() to the scheduler.
Add before_thread_runs_arch() and after_thread_ran_arch() for sparc64, mapping/demapping thread's kernel stack.
Add dummy after_thread_ran_arch() to all other architectures.
Add dtlb_insert_mapping() to promote code reuse.

Location:

arch/sparc64

Files:

• Makefile.inc (modified) (1 diff)
• include/drivers/i8042.h (modified) (3 diffs)
• include/mm/tlb.h (modified) (1 diff)
• include/trap/exception.h (modified) (2 diffs)
• src/console.c (modified) (2 diffs)
• src/mm/tlb.c (modified) (5 diffs)
• src/proc/scheduler.c (added)
• src/sparc64.c (modified) (1 diff)
• src/trap/exception.c (modified) (1 diff)
• src/trap/trap_table.S (modified) (2 diffs)

arch/sparc64/Makefile.inc

@@ -82 +82 @@
         arch/$(ARCH)/src/sparc64.c \
         arch/$(ARCH)/src/start.S \
+        arch/$(ARCH)/src/proc/scheduler.c \
         arch/$(ARCH)/src/trap/trap_table.S \
         arch/$(ARCH)/src/trap/trap.c \

arch/sparc64/include/drivers/i8042.h

@@ -33 +33 @@
 
 #define KBD_PHYS_ADDRESS        0x1fff8904000ULL
-#define KBD_VIRT_ADDRESS        0x00000d00000ULL
+#define KBD_VIRT_ADDRESS        0x000d0000000ULL
 
 #define STATUS_REG      4
@@ -41 +41 @@
 static inline void i8042_data_write(__u8 data)
 {
-        ((__u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data;
+        ((volatile __u8 *)(KBD_VIRT_ADDRESS))[DATA_REG] = data;
 }
 
@@ -56 +56 @@
 static inline void i8042_command_write(__u8 command)
 {
-        ((__u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command;
+        ((volatile __u8 *)(KBD_VIRT_ADDRESS))[COMMAND_REG] = command;
 }
 

arch/sparc64/include/mm/tlb.h

@@ -406 +406 @@
 extern void fast_data_access_protection(void);
 
+extern void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable);
+
 #endif

arch/sparc64/include/trap/exception.h

@@ -32 +32 @@
 #define TT_INSTRUCTION_ACCESS_EXCEPTION         0x08
 #define TT_ILLEGAL_INSTRUCTION                  0x10
+#define TT_DATA_ACCESS_ERROR                    0x32
 #define TT_MEM_ADDRESS_NOT_ALIGNED              0x34
 
@@ -37 +38 @@
 extern void do_instruction_access_exc(void);
 extern void do_mem_address_not_aligned(void);
+extern void do_data_access_error(void);
 extern void do_illegal_instruction(void);
 #endif /* !__ASM__ */

arch/sparc64/src/console.c

@@ -41 +41 @@
 #include <proc/thread.h>
 #include <synch/mutex.h>
+#include <arch/mm/tlb.h>
 
 #define KEYBOARD_POLL_PAUSE     50000   /* 50ms */
@@ -76 +77 @@
         ofw_console_active = 0;
         stdin = NULL;
+
+        dtlb_insert_mapping(FB_VIRT_ADDRESS, FB_PHYS_ADDRESS, PAGESIZE_4M, true, false);
+        dtlb_insert_mapping(KBD_VIRT_ADDRESS, KBD_PHYS_ADDRESS, PAGESIZE_8K, true, false);
+
         fb_init(FB_VIRT_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH/8);
         i8042_init();

arch/sparc64/src/mm/tlb.c

@@ -110 +110 @@
         dmmu_enable();
         immu_enable();
-        
-        /*
-         * Quick hack: map frame buffer
-         */
-        fr.address = FB_PHYS_ADDRESS;
-        pg.address = FB_VIRT_ADDRESS;
+}
+
+/** Insert privileged mapping into DMMU TLB.
+ *
+ * @param page Virtual page address.
+ * @param frame Physical frame address.
+ * @param pagesize Page size.
+ * @param locked True for permanent mappings, false otherwise.
+ * @param cacheable True if the mapping is cacheable, false otherwise.
+ */
+void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable)
+{
+        tlb_tag_access_reg_t tag;
+        tlb_data_t data;
+        page_address_t pg;
+        frame_address_t fr;
+
+        pg.address = page;
+        fr.address = frame;
 
         tag.value = ASID_KERNEL;
@@ -124 +137 @@
         data.value = 0;
         data.v = true;
-        data.size = PAGESIZE_4M;
+        data.size = pagesize;
         data.pfn = fr.pfn;
-        data.l = true;
-        data.cp = 0;
-        data.cv = 0;
+        data.l = locked;
+        data.cp = cacheable;
+        data.cv = cacheable;
         data.p = true;
         data.w = true;
@@ -134 +147 @@
 
         dtlb_data_in_write(data.value);
-        
-        /*
-         * Quick hack: map keyboard
-         */
-        fr.address = KBD_PHYS_ADDRESS;
-        pg.address = KBD_VIRT_ADDRESS;
-
-        tag.value = ASID_KERNEL;
-        tag.vpn = pg.vpn;
-
-        dtlb_tag_access_write(tag.value);
-
-        data.value = 0;
-        data.v = true;
-        data.size = PAGESIZE_8K;
-        data.pfn = fr.pfn;
-        data.l = true;
-        data.cp = 0;
-        data.cv = 0;
-        data.p = true;
-        data.w = true;
-        data.g = true;
-
-        dtlb_data_in_write(data.value);
 }
 
@@ -170 +159 @@
 {
         tlb_tag_access_reg_t tag;
-        tlb_data_t data;
         __address tpc;
         char *tpc_str;
@@ -187 +175 @@
          * Identity map piece of faulting kernel address space.
          */
-        data.value = 0;
-        data.v = true;
-        data.size = PAGESIZE_8K;
-        data.pfn = tag.vpn;
-        data.l = false;
-        data.cp = 1;
-        data.cv = 1;
-        data.p = true;
-        data.w = true;
-        data.g = true;
-
-        dtlb_data_in_write(data.value);
+        dtlb_insert_mapping(tag.vpn * PAGE_SIZE, tag.vpn * FRAME_SIZE, PAGESIZE_8K, false, true);
 }
 

arch/sparc64/src/sparc64.c

@@ -75 +75 @@
 {
 }
-
-void before_thread_runs_arch(void)
-{
-}

arch/sparc64/src/trap/exception.c

@@ -43 +43 @@
 }
 
+/** Handle data_access_error. */
+void do_data_access_error(void)
+{
+        panic("Data Access Error: %P\n", tpc_read());
+}
+
 /** Handle mem_address_not_aligned. */
 void do_illegal_instruction(void)

arch/sparc64/src/trap/trap_table.S

@@ -73 +73 @@
         CLEAN_WINDOW_HANDLER
 
+/* TT = 0x32, TL = 0, data_access_error */
+.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
+.global data_access_error
+data_access_error:
+        SIMPLE_HANDLER do_data_access_error
+
 /* TT = 0x34, TL = 0, mem_address_not_aligned */
 .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
@@ -226 +232 @@
 clean_window_handler_high:
         CLEAN_WINDOW_HANDLER
+
+/* TT = 0x32, TL > 0, data_access_error */
+.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
+.global data_access_error_high
+data_access_error_high:
+        SIMPLE_HANDLER do_data_access_error
 
 /* TT = 0x34, TL > 0, mem_address_not_aligned */