Changeset 973ef9fc in mainline for kernel/arch/mips32/src


Ignore:
Timestamp:
2010-12-25T21:20:28Z (15 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
631ee0c
Parents:
1bfd3d3 (diff), 09178b7f (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/mips32/src
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/mips32/src/cache.c

    r1bfd3d3 r973ef9fc  
    3939void cache_error(istate_t *istate)
    4040{
    41         panic("cache_error exception (epc=%p).", istate->epc);
     41        panic("cache_error exception (epc=%p).", (void *) istate->epc);
    4242}
    4343

  • kernel/arch/mips32/src/debugger.c

    r1bfd3d3 r973ef9fc  
    134134 *
    135135 */
    136 bool is_jump(unative_t instr)
     136bool is_jump(sysarg_t instr)
    137137{
    138138        unsigned int i;
    … …  
    166166                        return 0;
    167167                } else if ((breakpoints[i].address == (uintptr_t) argv->intval +
    168                     sizeof(unative_t)) || (breakpoints[i].address ==
    169                     (uintptr_t) argv->intval - sizeof(unative_t))) {
     168                    sizeof(sysarg_t)) || (breakpoints[i].address ==
     169                    (uintptr_t) argv->intval - sizeof(sysarg_t))) {
    170170                        printf("Adjacent breakpoints not supported, conflict "
    171171                            "with %d.\n", i);
    … …  
    191191        }
    192192       
    193         printf("Adding breakpoint on address %p\n", argv->intval);
     193        printf("Adding breakpoint on address %p\n", (void *) argv->intval);
    194194       
    195195        cur->address = (uintptr_t) argv->intval;
    196         cur->instruction = ((unative_t *) cur->address)[0];
    197         cur->nextinstruction = ((unative_t *) cur->address)[1];
     196        cur->instruction = ((sysarg_t *) cur->address)[0];
     197        cur->nextinstruction = ((sysarg_t *) cur->address)[1];
    198198        if (argv == &add_argv) {
    199199                cur->flags = 0;
    … …  
    209209       
    210210        /* Set breakpoint */
    211         *((unative_t *) cur->address) = 0x0d;
     211        *((sysarg_t *) cur->address) = 0x0d;
    212212        smc_coherence(cur->address);
    213213       
    … …  
    247247        smc_coherence(((uint32_t *) cur->address)[1]);
    248248       
    249         cur->address = NULL;
     249        cur->address = (uintptr_t) NULL;
    250250       
    251251        irq_spinlock_unlock(&bkpoint_lock, true);
    … …  
    267267                            breakpoints[i].address);
    268268                       
    269                         printf("%-4u %7" PRIs " %p %-8s %-9s %-10s %s\n", i,
    270                             breakpoints[i].counter, breakpoints[i].address,
     269                        printf("%-4u %7zu %p %-8s %-9s %-10s %s\n", i,
     270                            breakpoints[i].counter, (void *) breakpoints[i].address,
    271271                            ((breakpoints[i].flags & BKPOINT_INPROG) ? "true" :
    272272                            "false"), ((breakpoints[i].flags & BKPOINT_ONESHOT)
    … …  
    289289       
    290290        for (i = 0; i < BKPOINTS_MAX; i++)
    291                 breakpoints[i].address = NULL;
     291                breakpoints[i].address = (uintptr_t) NULL;
    292292       
    293293#ifdef CONFIG_KCONSOLE
    … …  
    341341                /* Reinst only breakpoint */
    342342                if ((breakpoints[i].flags & BKPOINT_REINST) &&
    343                     (fireaddr == breakpoints[i].address + sizeof(unative_t))) {
     343                    (fireaddr == breakpoints[i].address + sizeof(sysarg_t))) {
    344344                        cur = &breakpoints[i];
    345345                        break;
    … …  
    366366               
    367367                if (!(cur->flags & BKPOINT_FUNCCALL)) {
    368                         printf("***Breakpoint %u: %p in %s.\n", i, fireaddr,
     368                        printf("***Breakpoint %u: %p in %s.\n", i,
     369                            (void *) fireaddr,
    369370                            symtab_fmt_name_lookup(fireaddr));
    370371                }
    … …  
    381382                cur->flags |= BKPOINT_INPROG;
    382383        } else {
    383                 printf("***Breakpoint %d: %p in %s.\n", i, fireaddr,
     384                printf("***Breakpoint %d: %p in %s.\n", i,
     385                    (void *) fireaddr,
    384386                    symtab_fmt_name_lookup(fireaddr));
    385387               
    … …  
    417419                /* Remove one-shot breakpoint */
    418420                if ((cur->flags & BKPOINT_ONESHOT))
    419                         cur->address = NULL;
     421                        cur->address = (uintptr_t) NULL;
    420422               
    421423                /* Remove in-progress flag */

  • kernel/arch/mips32/src/exception.c

    r1bfd3d3 r973ef9fc  
    7474void istate_decode(istate_t *istate)
    7575{
    76         printf("epc=%p\tsta=%p\tlo =%p\thi =%p\n",
    77             istate->epc, istate->status, istate->lo, istate->hi);
    78         printf("a0 =%p\ta1 =%p\ta2 =%p\ta3 =%p\n",
     76        printf("epc=%p\tsta=%#010" PRIx32 "\t"
     77            "lo =%#010" PRIx32 "\thi =%#010" PRIx32 "\n",
     78            (void *) istate->epc, istate->status,
     79            istate->lo, istate->hi);
     80       
     81        printf("a0 =%#010" PRIx32 "\ta1 =%#010" PRIx32 "\t"
     82            "a2 =%#010" PRIx32 "\ta3 =%#010" PRIx32 "\n",
    7983            istate->a0, istate->a1, istate->a2, istate->a3);
    80         printf("t0 =%p\tt1 =%p\tt2 =%p\tt3 =%p\n",
     84       
     85        printf("t0 =%#010" PRIx32 "\tt1 =%#010" PRIx32 "\t"
     86            "t2 =%#010" PRIx32 "\tt3 =%#010" PRIx32 "\n",
    8187            istate->t0, istate->t1, istate->t2, istate->t3);
    82         printf("t4 =%p\tt5 =%p\tt6 =%p\tt7 =%p\n",
     88       
     89        printf("t4 =%#010" PRIx32 "\tt5 =%#010" PRIx32 "\t"
     90            "t6 =%#010" PRIx32 "\tt7 =%#010" PRIx32 "\n",
    8391            istate->t4, istate->t5, istate->t6, istate->t7);
    84         printf("t8 =%p\tt9 =%p\tv0 =%p\tv1 =%p\n",
     92       
     93        printf("t8 =%#010" PRIx32 "\tt9 =%#010" PRIx32 "\t"
     94            "v0 =%#010" PRIx32 "\tv1 =%#010" PRIx32 "\n",
    8595            istate->t8, istate->t9, istate->v0, istate->v1);
    86         printf("s0 =%p\ts1 =%p\ts2 =%p\ts3 =%p\n",
     96       
     97        printf("s0 =%#010" PRIx32 "\ts1 =%#010" PRIx32 "\t"
     98            "s2 =%#010" PRIx32 "\ts3 =%#010" PRIx32 "\n",
    8799            istate->s0, istate->s1, istate->s2, istate->s3);
    88         printf("s4 =%p\ts5 =%p\ts6 =%p\ts7 =%p\n",
     100       
     101        printf("s4 =%#010" PRIx32 "\ts5 =%#010" PRIx32 "\t"
     102            "s6 =%#010" PRIx32 "\ts7 =%#010" PRIx32 "\n",
    89103            istate->s4, istate->s5, istate->s6, istate->s7);
    90         printf("s8 =%p\tat =%p\tkt0=%p\tkt1=%p\n",
     104       
     105        printf("s8 =%#010" PRIx32 "\tat =%#010" PRIx32 "\t"
     106            "kt0=%#010" PRIx32 "\tkt1=%#010" PRIx32 "\n",
    91107            istate->s8, istate->at, istate->kt0, istate->kt1);
     108       
    92109        printf("sp =%p\tra =%p\tgp =%p\n",
    93             istate->sp, istate->ra, istate->gp);
     110            (void *) istate->sp, (void *) istate->ra,
     111            (void *) istate->gp);
    94112}
    95113

  • kernel/arch/mips32/src/mips32.c

    r1bfd3d3 r973ef9fc  
    168168void arch_post_smp_init(void)
    169169{
     170        static const char *platform;
     171
     172        /* Set platform name. */
     173#ifdef MACHINE_msim
     174        platform = "msim";
     175#endif
     176#ifdef MACHINE_bgxemul
     177        platform = "gxemul";
     178#endif
     179#ifdef MACHINE_lgxemul
     180        platform = "gxemul";
     181#endif
     182        sysinfo_set_item_data("platform", NULL, (void *) platform,
     183            str_size(platform));
     184
    170185#ifdef CONFIG_MIPS_KBD
    171186        /*
    … …  
    233248 * possible to have it separately in the future.
    234249 */
    235 unative_t sys_tls_set(unative_t addr)
     250sysarg_t sys_tls_set(sysarg_t addr)
    236251{
    237252        return 0;

  • kernel/arch/mips32/src/mm/tlb.c

    r1bfd3d3 r973ef9fc  
    323323        uintptr_t va = cp0_badvaddr_read();
    324324       
    325         fault_if_from_uspace(istate, "TLB Refill Exception on %p.", va);
     325        fault_if_from_uspace(istate, "TLB Refill Exception on %p.",
     326            (void *) va);
    326327        panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Refill Exception.");
    327328}
    … …  
    332333        uintptr_t va = cp0_badvaddr_read();
    333334       
    334         fault_if_from_uspace(istate, "TLB Invalid Exception on %p.", va);
     335        fault_if_from_uspace(istate, "TLB Invalid Exception on %p.",
     336            (void *) va);
    335337        panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Invalid Exception.");
    336338}
    … …  
    340342        uintptr_t va = cp0_badvaddr_read();
    341343       
    342         fault_if_from_uspace(istate, "TLB Modified Exception on %p.", va);
     344        fault_if_from_uspace(istate, "TLB Modified Exception on %p.",
     345            (void *) va);
    343346        panic_memtrap(istate, PF_ACCESS_WRITE, va, "TLB Modified Exception.");
    344347}

  • kernel/arch/mips32/src/smp/dorder.c

    r1bfd3d3 r973ef9fc  
    3737#include <arch/smp/dorder.h>
    3838
    39 #define MSIM_DORDER_ADDRESS  0xB0000004
     39#define MSIM_DORDER_ADDRESS  0xB0000100
    4040
    4141#ifdef CONFIG_SMP
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