Changeset 8c15255 in mainline for kernel

Timestamp:

2011-08-18T21:32:56Z (14 years ago)

Author:

Martin Sucha <sucha14@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

ac7f81d

Parents:

f4fa6d9

Message:

Add support for i486/vortex86 processor

Location:

kernel/arch/ia32

Files:

• Makefile.inc (modified) (1 diff)
• include/asm.h (modified) (2 diffs)
• include/atomic.h (modified) (1 diff)
• include/cycle.h (modified) (2 diffs)
• src/asm.S (modified) (1 diff)
• src/cpu/cpu.c (modified) (1 diff)
• src/proc/scheduler.c (modified) (1 diff)
• src/syscall.c (modified) (2 diffs)

kernel/arch/ia32/Makefile.inc

@@ -64 +64 @@
 endif
 
+ifeq ($(PROCESSOR),i486)
+        CMN2 = -march=i486
+endif
+
 ifeq ($(PROCESSOR),core)
         CMN2 = -march=prescott

kernel/arch/ia32/include/asm.h

@@ -311 +311 @@
 }
 
+#ifndef PROCESSOR_i486
 /** Write to MSR */
 NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
@@ -321 +322 @@
         );
 }
+#endif
 
 NO_TRACE static inline uint64_t read_msr(uint32_t msr)

kernel/arch/ia32/include/atomic.h

@@ -121 +121 @@
         asm volatile (
                 "0:\n"
+#ifndef PROCESSOR_i486
                 "pause\n"        /* Pentium 4's HT love this instruction */
+#endif
                 "mov %[count], %[tmp]\n"
                 "testl %[tmp], %[tmp]\n"

kernel/arch/ia32/include/cycle.h

@@ -40 +40 @@
 NO_TRACE static inline uint64_t get_cycle(void)
 {
+#ifdef PROCESSOR_i486
+        return 0;
+#else
         uint64_t v;
         
@@ -48 +51 @@
         
         return v;
+#endif
 }
 

kernel/arch/ia32/src/asm.S

@@ -405 +405 @@
         xorl %eax, %eax
         cmpl $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%esp)
+#ifdef PROCESSOR_i486
+        jz 0f
+        movl %eax, %ebp
+0:
+#else
         cmovnzl %eax, %ebp
+#endif
 
         movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp)

kernel/arch/ia32/src/cpu/cpu.c

@@ -118 +118 @@
                 );
         }
-        
+
+#ifndef PROCESSOR_i486
         if (CPU->arch.fi.bits.sep) {
                 /* Setup fast SYSENTER/SYSEXIT syscalls */
                 syscall_setup_cpu();
         }
+#endif
 }
 

kernel/arch/ia32/src/proc/scheduler.c

@@ -60 +60 @@
         uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE];
         
+#ifndef PROCESSOR_i486
         if (CPU->arch.fi.bits.sep) {
                 /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
                 write_msr(IA32_MSR_SYSENTER_ESP, kstk - sizeof(istate_t));
         }
+#endif
         
         /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */

kernel/arch/ia32/src/syscall.c

@@ -39 +39 @@
 #include <arch/pm.h>
 
+#ifndef PROCESSOR_i486
 /** Enable & setup support for SYSENTER/SYSEXIT */
 void syscall_setup_cpu(void)
@@ -49 +50 @@
         write_msr(IA32_MSR_SYSENTER_EIP, (uint32_t) sysenter_handler);
 }
+#endif
 
 /** @}