Changeset 89c57b6 in mainline for kernel/arch/ia64/include/interrupt.h
- Timestamp:
- 2011-04-13T14:45:41Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 88634420
- Parents:
- cefb126 (diff), 17279ead (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - File:
-
- 1 edited
-
kernel/arch/ia64/include/interrupt.h (modified) (3 diffs)
Legend:
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- Added
- Removed
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kernel/arch/ia64/include/interrupt.h
rcefb126 r89c57b6 37 37 38 38 #include <typedefs.h> 39 #include <arch/ register.h>39 #include <arch/istate.h> 40 40 41 41 /** ia64 has 256 INRs. */ … … 61 61 #define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) 62 62 #define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) 63 #define IRQ_ DP8390 (0x09 + LEGACY_INTERRUPT_BASE)63 #define IRQ_NE2000 (0x09 + LEGACY_INTERRUPT_BASE) 64 64 65 65 /** General Exception codes. */ … … 73 73 #define EOI 0 /**< The actual value doesn't matter. */ 74 74 75 typedef struct istate {76 uint128_t f2;77 uint128_t f3;78 uint128_t f4;79 uint128_t f5;80 uint128_t f6;81 uint128_t f7;82 uint128_t f8;83 uint128_t f9;84 uint128_t f10;85 uint128_t f11;86 uint128_t f12;87 uint128_t f13;88 uint128_t f14;89 uint128_t f15;90 uint128_t f16;91 uint128_t f17;92 uint128_t f18;93 uint128_t f19;94 uint128_t f20;95 uint128_t f21;96 uint128_t f22;97 uint128_t f23;98 uint128_t f24;99 uint128_t f25;100 uint128_t f26;101 uint128_t f27;102 uint128_t f28;103 uint128_t f29;104 uint128_t f30;105 uint128_t f31;106 107 uintptr_t ar_bsp;108 uintptr_t ar_bspstore;109 uintptr_t ar_bspstore_new;110 uint64_t ar_rnat;111 uint64_t ar_ifs;112 uint64_t ar_pfs;113 uint64_t ar_rsc;114 uintptr_t cr_ifa;115 cr_isr_t cr_isr;116 uintptr_t cr_iipa;117 psr_t cr_ipsr;118 uintptr_t cr_iip;119 uint64_t pr;120 uintptr_t sp;121 122 /*123 * The following variables are defined only for break_instruction124 * handler.125 */126 uint64_t in0;127 uint64_t in1;128 uint64_t in2;129 uint64_t in3;130 uint64_t in4;131 uint64_t in5;132 uint64_t in6;133 } istate_t;134 135 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)136 {137 istate->cr_iip = retaddr;138 istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */139 }140 141 static inline unative_t istate_get_pc(istate_t *istate)142 {143 return istate->cr_iip;144 }145 146 static inline unative_t istate_get_fp(istate_t *istate)147 {148 return 0; /* FIXME */149 }150 151 static inline int istate_from_uspace(istate_t *istate)152 {153 return (istate->cr_iip) < 0xe000000000000000ULL;154 }155 156 75 extern void *ivt; 157 76 158 extern void general_exception(uint64_t vector, istate_t *istate);159 extern int break_instruction(uint64_t vector, istate_t *istate);160 extern void universal_handler(uint64_t vector, istate_t *istate);161 extern void nop_handler(uint64_t vector, istate_t *istate);162 extern void external_interrupt(uint64_t vector, istate_t *istate);163 extern void disabled_fp_register(uint64_t vector, istate_t *istate);77 extern void general_exception(uint64_t, istate_t *); 78 extern int break_instruction(uint64_t, istate_t *); 79 extern void universal_handler(uint64_t, istate_t *); 80 extern void nop_handler(uint64_t, istate_t *); 81 extern void external_interrupt(uint64_t, istate_t *); 82 extern void disabled_fp_register(uint64_t, istate_t *); 164 83 165 extern void trap_virtual_enable_irqs(uint16_t irqmask);84 extern void trap_virtual_enable_irqs(uint16_t); 166 85 167 86 #endif
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